Lack of bit field instructions in x86 instruction set because of patents ?

Hello,

I have a question for you:

Can the lack of bit field instructions in the x86 instruction set be
explained by patents held by other cpu designers like motorola ?

Or is there another reason why x86 instruction set is missing bit field
instructions ?

Bye,
Skybuck.

Skybuck Flying wrote:
Hello,

I have a question for you:

Can the lack of bit field instructions in the x86 instruction set be
explained by patents held by other cpu designers like motorola ?

Or is there another reason why x86 instruction set is missing bit field
instructions ?

Bye,
Skybuck.

What kind of bit field instruction(s) is lacking?

"JJ" wrote in message
...
Skybuck Flying wrote:
Hello,

I have a question for you:

Can the lack of bit field instructions in the x86 instruction set be
explained by patents held by other cpu designers like motorola ?

Or is there another reason why x86 instruction set is missing bit field
instructions ?

Bye,
Skybuck.

What kind of bit field instruction(s) is lacking?

See motorola processor or nec processor.

InsertBits, ExtractBits, stuff like that

Bye,
Skybuck.

Skybuck Flying wrote:
Hello,

I have a question for you:

Can the lack of bit field instructions in the x86 instruction set be
explained by patents held by other cpu designers like motorola ?

Or is there another reason why x86 instruction set is missing bit field
instructions ?

Bye,
Skybuck.


HAY! I will have you know that the cows are *NOT* missing bits in the
field!

"Skybuck Flying" wrote in message
b.home.nl...
Hello,

I have a question for you:

Can the lack of bit field instructions in the x86 instruction set be
explained by patents held by other cpu designers like motorola ?

Or is there another reason why x86 instruction set is missing bit field
instructions ?

Bye,
Skybuck.


So that means that BT, BTC, BTR and BTS were not sufficient? Your bitfields
must be larger?

On Fri, 06 Mar 2009 04:57:23 -0000, Skybuck Flying
wrote:

Can the lack of bit field instructions in the x86 instruction set be
explained by patents held by other cpu designers like motorola ?

Certainly not, since bit-fields are both obvious and have been implemented
in a variety of machines for the past 50 years or so.

Or is there another reason why x86 instruction set is missing bit field
instructions ?

They aren't worth it. On the few occasions when you need the facility, a
mask and shift takes just two more instructions. (For comparisons or
arithmetic on similar bit-fields, you can even omit the shift step.)

On Mar 6, 2:22*am, "Skybuck Flying" wrote:
"JJ" wrote in message

...

Skybuck Flying wrote:
Hello,

I have a question for you:

Can the lack of bit field instructions in the x86 instruction set be
explained by patents held by other cpu designers like motorola ?

Or is there another reason why x86 instruction set is missing bit field
instructions ?

Bye,
* Skybuck.

What kind of bit field instruction(s) is lacking?

See motorola processor or nec processor.

InsertBits, ExtractBits, stuff like that

Bye,
* Skybuck.



Could you please explain why, in your opinion, instructions such as
the following 8 bit instructions as well as the respective 16 and 32
bit do not fit the bill?


OR AL,bbbbbbbbB
AND AL,bbbbbbbbB
XOR AL,bbbbbbbbB
TEST AL,bbbbbbbbB

where "b" represents a zero or one bit.

On Mar 5, 10:57*pm, "Skybuck Flying" wrote:
Can the lack of bit field instructions in the x86 instruction set be
explained by patents held by other cpu designers like motorola ?

No

Or is there another reason why x86 instruction set is missing bit field
instructions ?

Barcelona (AMD) introduced 5 (or was it 7) bit manipulation
instructions.

Mitch

Here is an example of what a motorola processor presumeably does with one
instruction:

function KeepLowBits( Value : longword; Bits : longword ) : longword;
inline;
begin
Result := Value; // 32 bits case.
if Bits = 31 then
begin
Result := Result and not (4294967295 shl Bits); // shl instruction limited
to 31.
end;
end;

function ShiftLeft( Left : longword; Right : Longword; Shift : longword ) :
longword;
asm
shld eax, edx, cl
end;

procedure WriteLongwordBits( Value : longword; Bits : longword; DestAddress
: pointer; DestBitIndex : longword );
var
vContent : longword;
vMask : longword;
vShift : longword;

vFirstContent : longword;
vSecondContent : longword;

vFirstMask : longword;
vSecondMask : longword;

vFirstAddress : longword;
vSecondAddress : longword;
begin
vContent := KeepLowBits( Value, Bits );
vMask := KeepLowBits( 4294967295, Bits );

vShift := DestBitIndex and 7;

vFirstContent := ShiftLeft( vContent, 0, vShift );
vSecondContent := ShiftLeft( 0, vContent, vShift );

vFirstMask := ShiftLeft( vMask, 0, vShift );
vSecondMask := ShiftLeft( 0, vMask, vShift );

vFirstAddress := longword(DestAddress) + (DestBitIndex shr 3); // div 32
vSecondAddress := vFirstAddress + 4;

Plongword(vFirstAddress)^ := (Plongword(vFirstAddress)^ and not vFirstMask)
or vFirstContent;
Plongword(vSecondAddress)^ := (Plongword(vSecondAddress)^ and not
vSecondMask) or vSecondContent;
end;

Bye,
Skybuck.

Can the lack of bit field instructions in the x86 instruction set be
explained by patents held by other cpu designers like motorola ?

Certainly not, since bit-fields are both obvious and have been implemented
in a variety of machines for the past 50 years or so.

That doesn't stop people from filing patents on bit field instructions.

Maybe intel/amd is scared of law suits ?


Or is there another reason why x86 instruction set is missing bit field
instructions ?

They aren't worth it. On the few occasions when you need the facility, a
mask and shift takes just two more instructions. (For comparisons or
arithmetic on similar bit-fields, you can even omit the shift step.)

This will work up to a certain point... mostly when it's possible to
shift-or bits into single memory cell or registers.

As soon as multiple memory cells have to be overwritten things can get quite
nasty... especially if bits need to be preserved...

So I don't agree with you.

A simple example where "extract bits" instruction could be usefull is for
huffman decompression... where huffman codes can have a number of variable
bit fields stuck next to each other.

Extracting those bit fields (huffman codes) requires multiple x86
instructions, which slows down the huffman decoder.

A single instruction to do that would be preferred and would
probably/possibly give higher decoding speed and this is just one but an
important example !

Bye,
Skybuck =D