If this is your first visit, be sure to check out the FAQ by clicking the link above. You may have to register before you can post: click the register link above to proceed. To start viewing messages, select the forum that you want to visit from the selection below. |
|
|
Thread Tools | Display Modes |
#1
|
|||
|
|||
Disabling L1 L2 Cache
How does one disable the L1 and L2 cache in the bios setup program for a
P4P800SE? The cache settings certainly don't jump right out at you, or maybe i am blind. |
#2
|
|||
|
|||
John M. Hunt wrote:
How does one disable the L1 and L2 cache in the bios setup program for a P4P800SE? The cache settings certainly don't jump right out at you, or maybe i am blind. I can't be of any help, but I am curious as to why you'd want to disable the cache... -- "Outback" Jon Gould | Let those who RIDE, 2003 Kawasaki Concours (wreck)| 1976 Honda CB750F (needs work)| DECIDE. 1972 Yamaha DS7 (project) | | HELMET LAWS SUCK CQ CQ CQ de KC2BNE | ______________________________|___________________ _________ AMD XP 2400+ @ 2180 MHz 768M PC2100 DDR @ 290 MHz Asus A7N8X-E Deluxe 120GB and 40GB Maxtor HD Asus GeForceFX 5600 (330/650) Cornerstone 21" Monitor Sony 52x32x52 CDRW NEC MultiSync 17" Monitor Sony 8X DVD+-RW Nostromo n50 Speedpad http://folding.stanford.edu - got folding? Team 33432 -----= Posted via Newsfeeds.Com, Uncensored Usenet News =----- http://www.newsfeeds.com - The #1 Newsgroup Service in the World! -----== Over 100,000 Newsgroups - 19 Different Servers! =----- |
#3
|
|||
|
|||
In article , "\"Outback\" Jon"
wrote: John M. Hunt wrote: How does one disable the L1 and L2 cache in the bios setup program for a P4P800SE? The cache settings certainly don't jump right out at you, or maybe i am blind. I can't be of any help, but I am curious as to why you'd want to disable the cache... He is trying to escape the clutches of the WinXP SP2 update. Methinks he is screwed. In my research so far today, I've uncovered a number of things missing from the AMI BIOS, and this just adds another one to the list. I don't see an L1/L2 disable function. (If there was a hot key to throw the BIOS into some kind of debug mode, that is the only extreme hypothesis I can think of...) I tried an experiment just now, using a recipe that worked in the past with Award BIOS, where you could use a microcode from another BIOS. The program CTMC accesses a built in microcode function that seems to be implemented in the Award BIOS - it allows programmatic loading of one 2KB microcode segment, and would have been a perfect way to get out of this jam. I tried it on my P4C800-E Deluxe with the original factory 1014 BIOS on it. My Northwood is at revision 17, and I got a revision 21 microcode to try and update it. Unfortunately, CTMC says the microcode update function is not supported, and because that function was specified at a particular interrupt number and function code (D042) by Intel, my theory was both the AMI and the Award BIOSes would work. Alas, such is not to be. John will have to flash up to 1005 or 1005.003, reinstall Windows, or move the disk to another computer and rename the update.sys file so it cannot load. This is my previous test of P4P800SE BIOS. http://groups.google.com/groups?selm...0192.168.1.177 HTH, Paul |
#4
|
|||
|
|||
"Paul" wrote in message ... In article , "\"Outback\" Jon" wrote: John M. Hunt wrote: How does one disable the L1 and L2 cache in the bios setup program for a P4P800SE? The cache settings certainly don't jump right out at you, or maybe i am blind. I can't be of any help, but I am curious as to why you'd want to disable the cache... He is trying to escape the clutches of the WinXP SP2 update. Methinks he is screwed. In my research so far today, I've uncovered a number of things missing from the AMI BIOS, and this just adds another one to the list. I don't see an L1/L2 disable function. (If there was a hot key to throw the BIOS into some kind of debug mode, that is the only extreme hypothesis I can think of...) I tried an experiment just now, using a recipe that worked in the past with Award BIOS, where you could use a microcode from another BIOS. The program CTMC accesses a built in microcode function that seems to be implemented in the Award BIOS - it allows programmatic loading of one 2KB microcode segment, and would have been a perfect way to get out of this jam. I tried it on my P4C800-E Deluxe with the original factory 1014 BIOS on it. My Northwood is at revision 17, and I got a revision 21 microcode to try and update it. Unfortunately, CTMC says the microcode update function is not supported, and because that function was specified at a particular interrupt number and function code (D042) by Intel, my theory was both the AMI and the Award BIOSes would work. Alas, such is not to be. John will have to flash up to 1005 or 1005.003, reinstall Windows, or move the disk to another computer and rename the update.sys file so it cannot load. This is my previous test of P4P800SE BIOS. http://groups.google.com/groups?selm...0192.168.1.177 HTH, Paul Many thanks Paul for your very informative message. I am not yet in trouble as I have been cautiously following the SP2/Prescott stories but have not actually tried SP2 Your suggestion to put the hard drive with the SP2 modification into another computer to remove the update file is an excellent one if I get onto trouble. Unfortunately, none of my other motherboards have SATA connectors, although in a pinch I could install a spare ribbon IDE drive in the P4P800SE, install XP from scratch, then put the SP2 inoperable boot SATA disk in as a non boot drive long enough to access and remove the offending file.. Off the top of your head, does the removal of the update fdile (which presumably prevents any microcode corrections or updates from installing) result in less satisfactory performance of the Prescott? It would appear that, at least in certain circumstances, the updates have some merit.. Also do you have any feeling regarding the likelihood of being able to use the TrueImage restore mechanism to restore the old C image (pre-SP2) if the computer is in the hung state which is the subject of all the Prescott/SP2 problems |
#5
|
|||
|
|||
In article , "John M.
Hunt" wrote: "Paul" wrote in message ... In article , "\"Outback\" Jon" wrote: John M. Hunt wrote: How does one disable the L1 and L2 cache in the bios setup program for a P4P800SE? The cache settings certainly don't jump right out at you, or maybe i am blind. I can't be of any help, but I am curious as to why you'd want to disable the cache... He is trying to escape the clutches of the WinXP SP2 update. Methinks he is screwed. In my research so far today, I've uncovered a number of things missing from the AMI BIOS, and this just adds another one to the list. I don't see an L1/L2 disable function. (If there was a hot key to throw the BIOS into some kind of debug mode, that is the only extreme hypothesis I can think of...) I tried an experiment just now, using a recipe that worked in the past with Award BIOS, where you could use a microcode from another BIOS. The program CTMC accesses a built in microcode function that seems to be implemented in the Award BIOS - it allows programmatic loading of one 2KB microcode segment, and would have been a perfect way to get out of this jam. I tried it on my P4C800-E Deluxe with the original factory 1014 BIOS on it. My Northwood is at revision 17, and I got a revision 21 microcode to try and update it. Unfortunately, CTMC says the microcode update function is not supported, and because that function was specified at a particular interrupt number and function code (D042) by Intel, my theory was both the AMI and the Award BIOSes would work. Alas, such is not to be. John will have to flash up to 1005 or 1005.003, reinstall Windows, or move the disk to another computer and rename the update.sys file so it cannot load. This is my previous test of P4P800SE BIOS. http://groups.google.com/groups?selm...0192.168.1.177 HTH, Paul Many thanks Paul for your very informative message. I am not yet in trouble as I have been cautiously following the SP2/Prescott stories but have not actually tried SP2 Your suggestion to put the hard drive with the SP2 modification into another computer to remove the update file is an excellent one if I get onto trouble. Unfortunately, none of my other motherboards have SATA connectors, although in a pinch I could install a spare ribbon IDE drive in the P4P800SE, install XP from scratch, then put the SP2 inoperable boot SATA disk in as a non boot drive long enough to access and remove the offending file.. Off the top of your head, does the removal of the update fdile (which presumably prevents any microcode corrections or updates from installing) result in less satisfactory performance of the Prescott? It would appear that, at least in certain circumstances, the updates have some merit.. Also do you have any feeling regarding the likelihood of being able to use the TrueImage restore mechanism to restore the old C image (pre-SP2) if the computer is in the hung state which is the subject of all the Prescott/SP2 problems To be honest with you, I haven't been following the SP2 story that closely, except for when it "splashes" into this newsgroup. To my way of thinking, Microsoft is loading a bad version of microcode with their update.sys file, and that is the problem. If the motherboard has a recent enough version of microcode, then the update.sys file checks the version and won't install the bad one. That is my guess. (We won't know the full story until one of the parties in this confesses :-) As to what is a sufficient microcode - if the version number returned by the Intel utility is like 7 or so, and you remove update.sys, I wouldn't expect any trouble. Microcode is used to fix bugs found in the processor, after it enters production, and a portion of the bugs are theoretical rather than practical. As for TrueImage, if that is a DOS based restore mechanism, it shouldn't care what is currently on the disk. If TrueImage relies on the Windows on the disk, it would be a different story, but it would make a pretty crappy imaging program if that is the way it worked :-) It is a real annoyance that the BIOS doesn't have a disable for L1/L2. I have a P4C800-E and I have the same problem. HTH, Paul |
#6
|
|||
|
|||
|
#7
|
|||
|
|||
"Milleron" wrote in message ... On Sat, 11 Sep 2004 07:14:38 -0400, (Paul) wrote: In article , "\"Outback\" Jon" wrote: John M. Hunt wrote: How does one disable the L1 and L2 cache in the bios setup program for a P4P800SE? The cache settings certainly don't jump right out at you, or maybe i am blind. I can't be of any help, but I am curious as to why you'd want to disable the cache... He is trying to escape the clutches of the WinXP SP2 update. Methinks he is screwed. In my research so far today, I've uncovered a number of things missing from the AMI BIOS, and this just adds another one to the list. I don't see an L1/L2 disable function. (If there was a hot key to throw the BIOS into some kind of debug mode, that is the only extreme hypothesis I can think of...) I tried an experiment just now, using a recipe that worked in the past with Award BIOS, where you could use a microcode from another BIOS. The program CTMC accesses a built in microcode function that seems to be implemented in the Award BIOS - it allows programmatic loading of one 2KB microcode segment, and would have been a perfect way to get out of this jam. I tried it on my P4C800-E Deluxe with the original factory 1014 BIOS on it. My Northwood is at revision 17, and I got a revision 21 microcode to try and update it. Unfortunately, CTMC says the microcode update function is not supported, and because that function was specified at a particular interrupt number and function code (D042) by Intel, my theory was both the AMI and the Award BIOSes would work. Alas, such is not to be. John will have to flash up to 1005 or 1005.003, reinstall Windows, or move the disk to another computer and rename the update.sys file so it cannot load. Paul, Why couldn't he leave the drive in his computer and rename update.sys from the Repair Console, as Microsoft suggests? Ron Yes, that is a possibility if the uppity Repair Console will cooperate. If the necessity arises ( I am not yet in trouble) I will try that first as it is an excellent suggestion John M. Hunt |
Thread Tools | |
Display Modes | |
|
|
Similar Threads | ||||
Thread | Thread Starter | Forum | Replies | Last Post |
Confused over AMD PR rating | Overclocking AMD Processors | 2 | January 28th 04 01:18 AM | |
integrated cache vs processor speed question?? | t d w | Homebuilt PC's | 2 | January 18th 04 09:25 PM |
Disabling disk cache? | Nuno Magalhaes | General | 2 | October 26th 03 11:08 PM |
New Hard Drive: 2MB cache vs. 8MB Cache | Purp1e | General | 9 | September 18th 03 05:52 AM |
Memtestx86 Cache Questions | S.Heenan | Overclocking AMD Processors | 8 | August 4th 03 08:19 PM |