Athlon64 Spanks P4 in 90nm Power Consumption tests

"keith" wrote in message
news
On Sun, 10 Oct 2004 19:13:46 +0000, alexi wrote:


Power consumption of CMOS is _proportional_ to core frequency.
Therefore the chart is likely to be something like this:

Not at *all* true. Active power consumption is proportional to frequency
times voltage *squared*. You assume voltage is a constant; it's not. You
also ignore leakage, which is an even higher-order issue, WRT voltage.
We're not in the 20th century, Toto.

Power
^
| **
| ** ++
| **++
| **+
| **
| 90nm +**
| ++**
| ++ **
| ++ **
| ++ **
|++ **
| **
|**
| 130nm
|
|
|
|
|
+------------------------------------------
0 Speed

Would it be nice if life were simple again. ...and June had the meal on
the table when the Ward came home...

--
Keith

Dear student Keith with severe deficit of attention, you said:

"You assume voltage is a constant; it's not"

Yes, I did assume the voltage is constant because it is.
It supposed to be a constant for a particular model of a processor,
and the mainboard power switcher works hard to maintain this.
To maintain the voltage constant regardless of the variable load,
AMD uses a four-wire connection and derives the feedback directly
from the CPU core. Therefore the voltage is constant at least
in first approximation, and if not, it is a small secondary effect
which should be neglected especially when trying to resolve
such questions as this topic, which is "Who sucks more at 90nm".

Second, even if a small voltage change does happen, the voltage gets
smaller, therefore the curvature, if any, is opposite to what was
drawn in the post I responded to.

Third, the leakage is already accounted for in my approximate chart,
by means of the offset in both functions. In the same first
approximation of course.

Forth, if you really need to compare how the power consumption
on two generation of processes scales with frequency, you better
make all possible efforts to ensure that all essential variables
stays the same over the course of experiments, including chips
temperature and core Vcc.

In any case, you need to learn how to differentiate first-order
effects from second-orders effects, and study the subject before
making a fool of yourself on a public forum like Usenet.

Next time pay attention, "Toto".

-aap

"alexi" wrote:

Dear student Keith with severe deficit of attention, you said:

I foresee a flame, in your future.

On Mon, 11 Oct 2004 02:47:33 +0000, alexi wrote:


"keith" wrote in message
news
On Sun, 10 Oct 2004 19:13:46 +0000, alexi wrote:


Power consumption of CMOS is _proportional_ to core frequency.
Therefore the chart is likely to be something like this:

Not at *all* true. Active power consumption is proportional to frequency
times voltage *squared*. You assume voltage is a constant; it's not. You
also ignore leakage, which is an even higher-order issue, WRT voltage.
We're not in the 20th century, Toto.

Power
^
| **
| ** ++
| **++
| **+
| **
| 90nm +**
| ++**
| ++ **
| ++ **
| ++ **
|++ **
| **
|**
| 130nm
|
|
|
|
|
+------------------------------------------
0 Speed

Would it be nice if life were simple again. ...and June had the meal on
the table when the Ward came home...

--
Keith

Dear student Keith with severe deficit of attention, you said:

Kidz. Cannot read and will never listen.

Dear yutz, I've been in this business likely longer than you've been
around. You're so wrong I cannot count the ways, but what the hell, your
kind is easy meat.

"You assume voltage is a constant; it's not"

Indeed. It is *NOT*.

Yes, I did assume the voltage is constant because it is.

You're ignorant too. It may have been a constant a dozen years ago, and
perhaps even five. It certainly isn't today. Nothing is a constant.

It supposed to be a constant for a particular model of a processor,

Define "model". Hell, even the frequency of a particular "model" is fixed
(ignoring power-saving features, of which you obviously are clueless)
which makes your asinine graph even sillier (can you say *point?*).

Your simpleton formula ignores all reality. (see: leakage)

and the mainboard power switcher works hard to maintain this. To
maintain the voltage constant regardless of the variable load, AMD uses
a four-wire connection and derives the feedback directly from the CPU
core. Therefore the voltage is constant at least in first approximation,
and if not, it is a small secondary effect which should be neglected
especially when trying to resolve such questions as this topic, which is
"Who sucks more at 90nm".


You really ought to argue with somone who hasn't been here. You simply
don't have a clue.

Ok, I'll be nice and let you show your wonderous experience; how do *you*
arrive at your wonderous graph for a *SINGLE* model of processor?

....the voltage doesn't vary, please!

Second, even if a small voltage change does happen, the voltage gets
smaller, therefore the curvature, if any, is opposite to what was drawn
in the post I responded to.

How the hell do you explain *your* graph? The frequency of your processor
is "fixed" too.

Third, the leakage is already accounted for in my approximate chart, by
means of the offset in both functions. In the same first approximation
of course.

Bull****. You haven't a clue.

Forth, if you really need to compare how the power consumption on two
generation of processes scales with frequency, you better make all
possible efforts to ensure that all essential variables stays the same
over the course of experiments, including chips temperature and core
Vcc.

*I* need do nothing. I'm not the newb here. I *do* this for a living.
You need to listen more and talk less ("what good is ignorance, unless you
demonstate it").


In any case, you need to learn how to differentiate first-order effects
from second-orders effects, and study the subject before making a fool
of yourself on a public forum like Usenet.

Oh, my!

Next time pay attention, "Toto".

Perhaps you want to 'splain your credentials Lucy? (...no don't you'll
look even more foolish)

--
Keith

On Mon, 11 Oct 2004 07:41:13 -0500, chrisv wrote:

"alexi" wrote:

Dear student Keith with severe deficit of attention, you said:

I foresee a flame, in your future.

Yeah, easy pickin's though.

--
Keith

"chrisv" wrote in message
...
"alexi" wrote:

Dear student Keith with severe deficit of attention, you said:

I foresee a flame, in your future.

I'am sorry, I didn't mean to offend one of the senior netizens
of this netgroup, just his unwaranted jump on my humble remark
sounded so "studentish". Next time I will research the posting
history and act accordingly :-)

- aap

On Tue, 12 Oct 2004 02:48:23 +0000, alexi wrote:


"chrisv" wrote in message
...
"alexi" wrote:

Dear student Keith with severe deficit of attention, you said:

I foresee a flame, in your future.

I'am sorry, I didn't mean to offend one of the senior netizens
of this netgroup, just his unwaranted jump on my humble remark
sounded so "studentish". Next time I will research the posting
history and act accordingly :-)

No offense taken. We're all here to learn. However, it *is*
more interesting to learn from those who actually know something. Perhaps
you want to clarify your position? Nah...

--
Keith

"keith" wrote in message
news
Kidz. Cannot read and will never listen.
....
You're ignorant too. It may have been a constant a dozen years ago, and
perhaps even five. It certainly isn't today. Nothing is a constant.
....
Your simpleton formula ignores all reality. (see: leakage)
.....
You really ought to argue with somone who hasn't been here. You simply
don't have a clue.
.....
Ok, I'll be nice and let you show your wonderous experience; how do *you*
arrive at your wonderous graph for a *SINGLE* model of processor?

...the voltage doesn't vary, please!
....
Bull****. You haven't a clue.
....
*I* need do nothing. I'm not the newb here. I *do* this for a living.
You need to listen more and talk less ("what good is ignorance, unless you
demonstate it").
....
Oh, my!

Perhaps you want to 'splain your credentials Lucy? (...no don't you'll
look even more foolish)

--
Keith


I appreciate your deeply-thought response (summarized above).
I think nobody should hit senior netizens and self-taught amateurs,
so I will limit myself to humble submission of my credentials,
although I do realize it might look foolish:

http://home.austin.rr.com/bah/

Have a nice day,

- aap

keith wrote:

*I* need do nothing. I'm not the newb here. I *do* this for a living.

Umm ... shouldn't that be past tense ?
"Did" instead of "do" ?
Thought I read something quite a while back about your
imminent retirement ?

On Tue, 12 Oct 2004 04:19:21 +0000, Rob Stow wrote:

keith wrote:

*I* need do nothing. I'm not the newb here. I *do* this for a living.

Umm ... shouldn't that be past tense ?
"Did" instead of "do" ?

Nope. Still learning new stuff.

Thought I read something quite a while back about your
imminent retirement ?

Not yet. I'm still in there, just crossed the threshold where it's my
choice which pocket I want to get paid from. OTOH, another bad
winter, after the summer that never happened, might convince me to think
again. ...consideration given to good offers. ;-)

--
Keith

keith wrote:
alexi wrote:
Michael Brown wrote:
Nadeem wrote:
rms wrote:

http://techreport.com/ja.zz?comments=7417

The results sound awful. I wonder what they actually used to
measure the wattage?

Presumably one of the many household-appliance-power-meter things.
There's a difference between running hot and being power hungry.
The Prescott is both (ie: runs hotter and uses more power than the
Northwood), but judging from these results the 90nm A64's are less
power-hungry than the 130nm parts. The jury appears to still be out
on whether it runs hotter or not.

What really needs to be done is for someone (TectReport would be
good, since they already have a 90nm 3500+) to test the chips at a
large range of frequencies and plot the results. If the results
look like (view with fixed width font):

graph snipped

Power consumption of CMOS is _proportional_ to core frequency.
Therefore the chart is likely to be something like this:

Not at *all* true. Active power consumption is proportional to
frequency times voltage *squared*. You assume voltage is a constant;
it's not. You also ignore leakage, which is an even higher-order
issue, WRT voltage. We're not in the 20th century, Toto.

If you've got a few minutes, there's a couple things I'd like clarification
on ... My original graph was drawn on the basis that in modern CPUs, nothing
is ever so nice as to go bad in only a linear way The only transistor
physics I have done is for low frequency and theoretical transistors (and
from a physics as opposed to engineering point of view) in which case the
power usage is proportional to the switching frequency, all other things
remaining equal. Assumimg also that modern CPUs are FET-like instead of
bipolar.

What actually happens in the *real* world? Assuming voltage remains
constant, how non-linear (with respect to frequency) is a transistor in the
range that it's typically being pushed in a modern CPU? And what is the main
contributor to that non-lineararity?

[...]

--
Michael Brown
www.emboss.co.nz : OOS/RSI software and more
Add michael@ to emboss.co.nz - My inbox is always open