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From the comments it comes down to testing with your application, if
you have a specific application which is dominant (eg, video processing). Dbase apps are a cruel breed. o Get as much in memory as possible o Get memory bandwidth as high as possible o Get the disk I/O subsystem on 64-bit 66Mhz+ o Burn the adaptec RAID card and stick quality in Dual Xeon (re HT) is swamped by the /potential/ of Opteron re its Hypertransport and similarly the Itanium2. That said, the HP 4-CPU Itanium2 showed that good performance was possible with good Eng. Market volume on such systems isn't gigantic re "importance" tho. Re HT or non-HT, it comes back to application. I'd prefer 4GB on my dbase server and non-HT than 2GB & HT. A lot of s/w is badly written, but HT does offer promise. The idea of multi-threaded components of a CPU die will grow: o Eventually/presently the plan is 2-CPU per CPU-package o One cools down whilst the other takes over re thermal load o Vastly more advanced (and transparent) that HT That said, it's not hard to envisage a world where it's not simply "A" or "B" area of the chip package doing the work, but micro-mgt of each 1mm^2 to linearise the thermal density over the whole area. Not had to cool a 150W chip - 300cfm does 1500W, 30cfm does 150W. Much much harder to cool small dense areas of silicon as output grows. By 2010 I think it's 10kW per CPU, since die-shrinkage is underperforming the growth in thermal output. Perhaps we have CPU the size of 8" floppies :-) So HT & likewise optimisation will probably become more important over time. Which is perhaps what Intel & MSFT require to keep us all upgrading :-) Why go A-E when you can make more profit going A-B-C-D-E. Taxi services have been proving it for decades... -- Dorothy Bradbury http://homepage.ntlworld.com/dorothy...ry/panaflo.htm |
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