AMD did it again !!

One of the problems with IC's is that there is a significant capacitance to
the silicon substrate caused by the reverse biased junctions that occur
naturally when defusing transistors into a silicon wafer. Up till now any
speed increases came from reducing the minimum feature size.

For years the industry struggled with SOS ( silicon on sapphire ) and some
expensive high frequency transistors use the technology.

AMD developed and brought to production SOI ( silicon on Insulator ). The 64
bit Claw Hammer uses a 0.13 minimum feature size and SOI .

The bad news is that the first AMD chip set ( the 8000 set ) still uses the
current, but now legacy PCI 2.x bus,
The good news is that the AMD 8133 does address PCI-X ( 64 bits ).

Maybe the world isn't ready for the wider and faster PCI-X.

This might explain why Microsoft jumped in bed with AMD with ADB.

JPS

"BarryNL" wrote in message ...
JimS wrote:
One of the problems with IC's is that there is a significant capacitance
to
the silicon substrate caused by the reverse biased junctions that occur
naturally when defusing transistors into a silicon wafer. Up till now
any
speed increases came from reducing the minimum feature size.

For years the industry struggled with SOS ( silicon on sapphire ) and
some
expensive high frequency transistors use the technology.

AMD developed and brought to production SOI ( silicon on Insulator ).
The 64
bit Claw Hammer uses a 0.13 minimum feature size and SOI .

The bad news is that the first AMD chip set ( the 8000 set ) still uses
the
current, but now legacy PCI 2.x bus,
The good news is that the AMD 8133 does address PCI-X ( 64 bits ).

Maybe the world isn't ready for the wider and faster PCI-X.

This might explain why Microsoft jumped in bed with AMD with ADB.


Erm, is this bits of three different articles pasted together?

OR Somebody trying, badly, to make them selves look intelligent.