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Intel Core 2 Extreme X6800 Preview from Taiwan



 
 
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  #1  
Old June 7th 06, 04:37 PM posted to alt.invest.stocks.amd,comp.sys.ibm.pc.hardware.chips
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Default Intel Core 2 Extreme X6800 Preview from Taiwan

Sure looks like Intel has leapfrogged AMD as badly as AMD had previously
leapfrogged Intel. The only problem I see though is that Intel isn't
expecting to have a lot of Core 2 Duos available for a while. Only 25%
of its production is going to be of this generation, the remaining 75%
will still be of the old Netburst generation. This means that it's going
to be selling tons of cheap undesirable Netburst processors at firesale
prices, which will result in a pricing war.

AnandTech: Intel Core 2 Extreme X6800 Preview from Taiwan
http://www.anandtech.com/cpuchipsets...oc.aspx?i=2771
  #2  
Old June 7th 06, 06:27 PM posted to alt.invest.stocks.amd,comp.sys.ibm.pc.hardware.chips
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Default Intel Core 2 Extreme X6800 Preview from Taiwan

Yousuf Khan wrote:
Sure looks like Intel has leapfrogged AMD as badly as AMD had previously
leapfrogged Intel. The only problem I see though is that Intel isn't
expecting to have a lot of Core 2 Duos available for a while. Only 25%
of its production is going to be of this generation, the remaining 75%
will still be of the old Netburst generation. This means that it's going
to be selling tons of cheap undesirable Netburst processors at firesale
prices, which will result in a pricing war.

AnandTech: Intel Core 2 Extreme X6800 Preview from Taiwan
http://www.anandtech.com/cpuchipsets...oc.aspx?i=2771


I must have been discussed before, but could you summarize in
a few sentences what are the main points that make Core 2 Duo work
so well across the board despite lower memory bandwitch and higher
latency. What is it - more cache? higher frequency? architecture
improvements?

Regards,
Evgenij

  #3  
Old June 7th 06, 07:52 PM posted to alt.invest.stocks.amd,comp.sys.ibm.pc.hardware.chips
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Default Intel Core 2 Extreme X6800 Preview from Taiwan

I must have been discussed before, but could you summarize in
a few sentences what are the main points that make Core 2 Duo work
so well across the board despite lower memory bandwitch and higher
latency. What is it - more cache? higher frequency? architecture
improvements?


Why don't you read this:
http://www.realworldtech.com/page.cf...WT030906143144

DK

  #4  
Old June 7th 06, 09:28 PM posted to alt.invest.stocks.amd,comp.sys.ibm.pc.hardware.chips
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Default Intel Core 2 Extreme X6800 Preview from Taiwan

David Kanter wrote:
I must have been discussed before, but could you summarize in
a few sentences what are the main points that make Core 2 Duo work
so well across the board despite lower memory bandwitch and higher
latency. What is it - more cache? higher frequency? architecture
improvements?


Why don't you read this:
http://www.realworldtech.com/page.cf...WT030906143144

DK

Excelent. That is exactly what I was looking for.
The short summary appears to be:
- many significant architecture improvements (main points are 4
operations vs 3 per cycle (~25% improvement), fusion of several external
ops into one internal (~10% improvement))
- higher frequency capability due to 65 nm process
- better use of L1 cache due to shared access between 2 CPUs
- more power management and 65 nm results in better efficiency
did I miss something critical?

Regards,
Evgenij
  #5  
Old June 7th 06, 10:07 PM posted to comp.arch,comp.sys.ibm.pc.hardware.chips
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Default Intel Core 2 Extreme X6800 Preview from Taiwan

Evgenij Barsukov wrote:
David Kanter wrote:

I must have been discussed before, but could you summarize in
a few sentences what are the main points that make Core 2 Duo work
so well across the board despite lower memory bandwitch and higher
latency. What is it - more cache? higher frequency? architecture
improvements?



Why don't you read this:
http://www.realworldtech.com/page.cf...WT030906143144

DK

Excelent. That is exactly what I was looking for.
The short summary appears to be:
- many significant architecture improvements (main points are 4
operations vs 3 per cycle (~25% improvement), fusion of several external
ops into one internal (~10% improvement))
- higher frequency capability due to 65 nm process
- better use of L1 cache due to shared access between 2 CPUs
- more power management and 65 nm results in better efficiency
did I miss something critical?

Regards,
Evgenij


Here you guys go. One for your very own to play with. Go to

http://www.techonline.com/community/..._systems/39098


- Processor: Intel® Core™ Duo 2.0GHz dual-core processor with 667MHz FSB
- Chipset: Intel® 82945GM GMCH with Graphics Media Accelerator 950 core
at 250MHz
- RAM: 256MB DDR2 system memory running at 667MHz
- Operating System: Windows XP Pro

They have other stuff to play with if you go upstream..... to
http://www.techonline.com/community/.../devel_systems
--
Del Cecchi
"This post is my own and doesn’t necessarily represent IBM’s positions,
strategies or opinions.”
  #6  
Old June 8th 06, 12:13 AM posted to alt.invest.stocks.amd,comp.sys.ibm.pc.hardware.chips
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Default Intel Core 2 Extreme X6800 Preview from Taiwan

Evgenij Barsukov wrote:
I must have been discussed before, but could you summarize in
a few sentences what are the main points that make Core 2 Duo work
so well across the board despite lower memory bandwitch and higher
latency. What is it - more cache? higher frequency? architecture
improvements?


Yeah, there's been some micro-architecture improvements, but that's to
be expected. Every new generation there are micro-architectural
improvements that will blow away the previous generation (there were
similar descriptions about Pentium 4's micro-architecture when it was
first introduced), but it's always been a little dubious how much gain
they actually get simply from micro-architecture in the real world. But
I think the real story here is Core 2's cache. Intel is managing to get
the same levels of latency from Core 2 that AMD gets from AMD64, even
without an inboard memory controller! It's likely that Core 2 is driving
close to maximum performance out of its FSB, more often than any
previous Intel architecture.

Yousuf Khan
  #7  
Old June 8th 06, 01:07 AM posted to alt.invest.stocks.amd,comp.sys.ibm.pc.hardware.chips
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Default Intel Core 2 Extreme X6800 Preview from Taiwan


"Yousuf Khan" wrote in message
...
Evgenij Barsukov wrote:
I must have been discussed before, but could you summarize in
a few sentences what are the main points that make Core 2 Duo work
so well across the board despite lower memory bandwitch and higher
latency. What is it - more cache? higher frequency? architecture
improvements?


Yeah, there's been some micro-architecture improvements, but that's to be
expected. Every new generation there are micro-architectural improvements
that will blow away the previous generation (there were similar
descriptions about Pentium 4's micro-architecture when it was first
introduced), but it's always been a little dubious how much gain they
actually get simply from micro-architecture in the real world. But I think
the real story here is Core 2's cache. Intel is managing to get the same
levels of latency from Core 2 that AMD gets from AMD64, even without an
inboard memory controller! It's likely that Core 2 is driving close to
maximum performance out of its FSB, more often than any previous Intel
architecture.

Yousuf Khan


Not at all. There have been many benchmarks showing that the increase in
performance of increasing the cache is relatively minor in the majority of
situations. It is true that "micro-architectural improvements" generally
lead to relatively small increases in performance. The one big difference
that has always been associated with major leaps in performance is when you
increase the number of instructions per clock. The reason that Conroe is so
exciting is that it does increase the IPC (for the first time since the
pentium pro?). An anandtech article states that "It can decode 4 x86
instructions per cycle, and sometimes 5 thanks to x86 fusion. AMD's Hammer
can do only 3." This is undoubtedly the major reason for the Core being so
much faster.


  #8  
Old June 8th 06, 03:05 AM posted to alt.invest.stocks.amd,comp.sys.ibm.pc.hardware.chips
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Default Intel Core 2 Extreme X6800 Preview from Taiwan

In comp.sys.ibm.pc.hardware.chips Yousuf Khan wrote in part:
Yeah, there's been some micro-architecture improvements,
but that's to be expected.


More than a few. There's a complete extra ALU+SSE2 _and_
the issue port to run it. With very tight (library) ASM, this
core will be quad issue. Most likely not on compiled x86-32
code (maybe on x86-64) because of only a single load port.
What wasn't mentioned were the multiplier(s).

The read/write reorder buffer algorithm has been significantly
altered, most likely for the better.

Every new generation there are micro-architectural
improvements that will blow away the previous generation


Can you not separate wheat from chaff? There's always
marketroid drool. Sometimes, it's even valid.

(there were similar descriptions about Pentium 4's
micro-architecture when it was first introduced), but it's


Purest drool. From day zero, the Pentium4 was obviously
a dual issue CPU that had only a high clock [necessitating
deep pipelining] to recommend it.

always been a little dubious how much gain they actually get
simply from micro-architecture in the real world.


Very true. Even the lame P4 can excel at certain linear
crunches. It was designed to [multimedia].

But I think the real story here is Core 2's cache. Intel
is managing to get the same levels of latency from Core 2
that AMD gets from AMD64, even without an inboard memory
controller! It's likely that Core 2 is driving close to
maximum performance out of its FSB, more often than any
previous Intel architecture.


I think not. The low apparent latency most likely is due to
intelligent [MCH] prefetch. Not a bad thing, but no substitute
for the real thing when doing unpredictable hop-scotching
like traversing a relational database.

Still, this Intel Core2 looks very good, and I expect it
to be competitive or beat the AMD K7 clock-for-clock
on most [linear] benchmarks. I expect it will only fail
on pseudorandom chases. Unless it has lame multipliers.

-- Robert


  #9  
Old June 8th 06, 03:14 AM posted to alt.invest.stocks.amd,comp.sys.ibm.pc.hardware.chips
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Default Intel Core 2 Extreme X6800 Preview from Taiwan

On Wed, 07 Jun 2006 11:37:54 -0400, Yousuf Khan
wrote:

Sure looks like Intel has leapfrogged AMD as badly as AMD had previously
leapfrogged Intel. The only problem I see though is that Intel isn't
expecting to have a lot of Core 2 Duos available for a while. Only 25%
of its production is going to be of this generation, the remaining 75%
will still be of the old Netburst generation. This means that it's going
to be selling tons of cheap undesirable Netburst processors at firesale
prices, which will result in a pricing war.

AnandTech: Intel Core 2 Extreme X6800 Preview from Taiwan
http://www.anandtech.com/cpuchipsets...oc.aspx?i=2771


Who could think just a couple of years ago that Intel would have a CPU
performing better than AMD at lower clock? And that this CPU will be
held back only by manufacturing?
However INTC is at its lowest in 3 years - $17.39 and sinking. In
fact, it sunk so deep that it might become a good investment just
before the official Core2 release - about a month from now. And
before that... Even $15 might be possible.
Meanwhile AMD is also sliding even faster than I expected. I thought
it would be around 25 by year end - now it looks more like low 20s...

NNN



  #10  
Old June 8th 06, 04:49 AM posted to alt.invest.stocks.amd,comp.sys.ibm.pc.hardware.chips
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Default Intel Core 2 Extreme X6800 Preview from Taiwan

On Wed, 07 Jun 2006 15:28:28 -0500, Evgenij Barsukov
wrote:

David Kanter wrote:
I must have been discussed before, but could you summarize in
a few sentences what are the main points that make Core 2 Duo work
so well across the board despite lower memory bandwitch and higher
latency. What is it - more cache? higher frequency? architecture
improvements?


Why don't you read this:
http://www.realworldtech.com/page.cf...WT030906143144

DK

Excelent. That is exactly what I was looking for.
The short summary appears to be:
- many significant architecture improvements (main points are 4
operations vs 3 per cycle (~25% improvement), fusion of several external
ops into one internal (~10% improvement))
- higher frequency capability due to 65 nm process
- better use of L1 cache due to shared access between 2 CPUs
- more power management and 65 nm results in better efficiency
did I miss something critical?


That's shared *L2* cache, which, in a kinda brute force way, is probably
the most important key: even a single task has up to 4MB of L2 cache, i.e.
huge in comparison with anything else. I'm not sure the micro-architecture
enhancements are really that significant - e.g., how often is a typical app
going to have just the right mix/order of instructions to exercise all 4
operation paths simultaneously?

On the subject of memory latency, you have to consider whether you want to
classify speculative tricks which are trying to predict pseudo-random
memory access strides as a valid solution to umm, "latency". IMO it just
means that the latency benchmarks need to be rewritten.:-)

--
Rgds, George Macdonald
 




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