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reason for AMD's Bulldozer fiasco?



 
 
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  #1  
Old October 21st 11, 02:47 PM posted to comp.sys.intel
Orson Cart
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Posts: 54
Default reason for AMD's Bulldozer fiasco?


http://www.xbitlabs.com/news/cpu/dis..._ Fiasco.html

Sounds plausible: way too many transistors plopped down by dumb automated design.
So they made an 8-cylinder CPU that is as good a Phenom X6 or an Intel quad
core...
On the other hand, what about the Interlagos? I haven't seen the tons of bad
reviews for that, and Cray bought the first 10,000 allegedly.
Aren't those things just bigger Zambesis that use ECC RAM?
  #2  
Old October 22nd 11, 01:19 AM posted to comp.sys.intel
Yousuf Khan[_2_]
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Posts: 1,296
Default reason for AMD's Bulldozer fiasco?

On 21/10/2011 9:47 AM, Orson Cart wrote:
http://www.xbitlabs.com/news/cpu/dis..._ Fiasco.html

Sounds plausible: way too many transistors plopped down by dumb automated design.
So they made an 8-cylinder CPU that is as good a Phenom X6 or an Intel quad
core...
On the other hand, what about the Interlagos? I haven't seen the tons of bad
reviews for that, and Cray bought the first 10,000 allegedly.
Aren't those things just bigger Zambesis that use ECC RAM?


I think the main difference is that the Interlagos Opteron chips are
being used in servers where all of the cores make a difference, but the
Zambezi desktop chips are being used in desktops and not fully utilized.
Good for multithreaded workloads, not great on single-threads though.

Yousuf Khan
  #3  
Old October 30th 11, 04:36 PM posted to comp.sys.intel
Robert Myers
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Posts: 606
Default reason for AMD's Bulldozer fiasco?

On Oct 21, 8:19*pm, Yousuf Khan wrote:
On 21/10/2011 9:47 AM, Orson Cart wrote:

http://www.xbitlabs.com/news/cpu/dis..._Ex_AMD_Engine...


Sounds plausible: way too many transistors plopped down by dumb automated design.
So they made an 8-cylinder CPU that is as good a Phenom X6 or an Intel quad
core...
On the other hand, what about the Interlagos? I haven't seen the tons of bad
reviews for that, and Cray bought the first 10,000 allegedly.
Aren't those things just bigger Zambesis that use ECC RAM?


I think the main difference is that the Interlagos Opteron chips are
being used in servers where all of the cores make a difference, but the
Zambezi desktop chips are being used in desktops and not fully utilized.
Good for multithreaded workloads, not great on single-threads though.


Apparently, AMD did too good a job selling its crippled "cores" as
"cores." Currently, the Microsoft scheduler will just as willingly
force two threads to share a common front end and FPU as to do the
more sensible thing and push the busiest threads onto separate front
ends and FPU's. Did no one at AMD check into that ahead of time? The
problem, of course, is not unfixable. Bulldozer will still be an
inferior product, but it won't be quite as disappointing for Windows,
once the Windows scheduler is fixed to accommodate AMD's "cores."

Robert.

  #4  
Old October 31st 11, 03:03 AM posted to comp.sys.intel
Yousuf Khan[_2_]
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Posts: 1,296
Default reason for AMD's Bulldozer fiasco?

On 10/30/2011 12:36 PM, Robert Myers wrote:
On Oct 21, 8:19 pm, Yousuf wrote:
I think the main difference is that the Interlagos Opteron chips are
being used in servers where all of the cores make a difference, but the
Zambezi desktop chips are being used in desktops and not fully utilized.
Good for multithreaded workloads, not great on single-threads though.


Apparently, AMD did too good a job selling its crippled "cores" as
"cores." Currently, the Microsoft scheduler will just as willingly
force two threads to share a common front end and FPU as to do the
more sensible thing and push the busiest threads onto separate front
ends and FPU's. Did no one at AMD check into that ahead of time? The
problem, of course, is not unfixable. Bulldozer will still be an
inferior product, but it won't be quite as disappointing for Windows,
once the Windows scheduler is fixed to accommodate AMD's "cores."


It probably explains why they fired their CEO, Dirk Meyer, early in the
year so unexpectedly. There was no real reason ever given at the time,
and that was a period of time when it looked like AMD was doing really
well too, but we can now guess in hindsight. They were probably already
aware of the problem back then.

AMD is now showing off the processor running under Windows 8 beta with
its newly designed scheduling system. It's showing some definite
improvements, both minuscule and significant. So I don't know if this is
an admission that Windows 7's scheduler will never be improved, or that
the Windows 8 scheduler won't be backported to Windows 7.

Another problem with the design seems to be that AMD designed their very
own Pentium 4-concept processor. That is, it's highly pipelined,
resulting in huge losses during branch misses, but also allowing it to
be clocked extremely high. And much like the Pentium 4's of old, the
performance never really took off until they were clocked really high.
Also like the Pentium 4's, highly clocking them also result in huge
power consumption.

They are talking about bringing out a new stepping that won't result in
better single-threaded performance, but in better power management. This
would indicate to me that they trying to beef up the power mgmt, so that
when they start clocking it really hard, then it won't be using any more
power than it is now.

Yousuf Khan
  #5  
Old November 1st 11, 08:25 PM posted to comp.sys.intel
Robert Myers
external usenet poster
 
Posts: 606
Default reason for AMD's Bulldozer fiasco?

On 30 oct, 23:03, Yousuf Khan wrote:

Another problem with the design seems to be that AMD designed their very
own Pentium 4-concept processor. That is, it's highly pipelined,
resulting in huge losses during branch misses, but also allowing it to
be clocked extremely high. And much like the Pentium 4's of old, the
performance never really took off until they were clocked really high.
Also like the Pentium 4's, highly clocking them also result in huge
power consumption.


The enormously long pipeline wasn't the only distinguishing feature of
NetBurst. According to someone I trust, parts of the NetBurst design
ran at double-time. Thus, parts of the 3GHz processors were already
running at 6GHz, thus explaining in part the enormous power
consumption problem that NetBurst had. Unfortunately, not enough
instructions would run on the faster pipeline to justify the design
strategy, and Intel was caught between an unexpected rock and hard
place. The original thought was to get a processor out with a label
frequency in well in excess of 1GHz, leaving AMD in the dust. Known
performance problems would be addressed by beefing up the faster
pipeline. In fact, the needed transistors may well have been in the
original NetBurst design and had to be thrown overboard because of the
power envelope. Intel probably knew a long time ago that the real
problem was power management. They just weren't as fast or as
successful in fixing it as they thought they would be.

Robert.
  #6  
Old November 3rd 11, 12:57 AM posted to comp.sys.intel
Yousuf Khan[_2_]
external usenet poster
 
Posts: 1,296
Default reason for AMD's Bulldozer fiasco?

On 01/11/2011 4:25 PM, Robert Myers wrote:
The enormously long pipeline wasn't the only distinguishing feature of
NetBurst. According to someone I trust, parts of the NetBurst design
ran at double-time. Thus, parts of the 3GHz processors were already
running at 6GHz, thus explaining in part the enormous power
consumption problem that NetBurst had. Unfortunately, not enough
instructions would run on the faster pipeline to justify the design
strategy, and Intel was caught between an unexpected rock and hard
place.


I think you're referring to the P4's floating point unit which was
optimized for SSE2, but fell behind in regular x87 floating point.
Interestingly, the new AMD Bulldozer floating point unit is expected to
perform best in the newer AVX or 256-bit SSE instructions, rather than
the older 128-bit SSE instructions.

There were other doubled-speed interfaces like their FSB, which was
running at 400MHz (eventually became 566MHz, I think), vs. AMD at
200-266MHz, or P3 at 100-133MHz. That required the highest-speed Rambus
or DDR memory to make good use of its bus.

The original thought was to get a processor out with a label
frequency in well in excess of 1GHz, leaving AMD in the dust. Known
performance problems would be addressed by beefing up the faster
pipeline. In fact, the needed transistors may well have been in the
original NetBurst design and had to be thrown overboard because of the
power envelope. Intel probably knew a long time ago that the real
problem was power management. They just weren't as fast or as
successful in fixing it as they thought they would be.


Which again seems to be the exact same problem that AMD will have to
face with Bulldozer. Their next revision stepping is going to be
entirely about getting the power consumption under control.

I think AMD's biggest problem was not that Bulldozer has low IPC (it
does), but that AMD couldn't right away bring Bulldozer out with enough
clock frequency to compensate for its IPC. It's now got to really start
pushing the clock speeds out.

Yousuf Khan
 




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