Another Intel vs AMD Comparison

Raymond wrote:
"Adam Webb" wrote in
message ...
Duh, that's not because of comparable pipeline lenghts. They are
trying to show off the Conroe at much lower power consumption.
You're comparing a present
AMD to a future not-yet released Intel using many more transistors,
that uses almost half as many watts and calling it a normalized
comparison, so it
must
be because of pipelines??? G
Good one!


OK then, compare it to the "standard" dothan thats been out about a
YEAR.....

its overclock limit is about the same as any A64 chip, they BOTH use
90nm proccess, and they BOTH have the same pipeline length, give or
take 1....and they ALSO perform about the same...

its funny, EVERYONE in the hardware world KNOWS that cpu speed (mhz
wise) and pipeline length are almost directly linked yet you
dont.... hmm nice one.

Yeah let's compare. Dothan uses less power than the Turion, while
running tens of millions of more transistors at about the same speed.
It has roughly twice the L2.

Do you have the slightest idea what the word "compare" means? If you do you
don't exhibit the fact. All you've done is rattle of a few features, with no
arrempt at a comparison if anything.

What everyone knows, or at least should, is that the pipeline length
is a major factor in the P4's problems. It's not a factor in clock
speed potential.

Wrong.

Show me one official document anywhere that says
otherwise!

You can either pick then at random from this search:

http://www.google.com/search?sourcei...and+clockspeed

Or here's one I randomly clicked for you:

http://www.eweek.com/article2/0,1895,1935051,00.asp

I quote from it for you:

******************************

"Pipeline length is an important element for chip performance and power. A
longer pipeline allows a chip to hit higher clock speeds-although clock
speed brings increases in power consumption-but performance gains don't
always ensue."

******************************

Read the article, (It's actually quite interesting) or one of many, many
articles about CPU architecture that say the same thing. It seems you have a
lot to learn.
--
~Shaun~

"~misfit~" wrote in message
...
You can either pick then at random from this search:

http://www.google.com/search?sourcei...and+clockspeed
Or here's one I randomly clicked for you:
http://www.eweek.com/article2/0,1895,1935051,00.asp
I quote from it for you:

******************************
"Pipeline length is an important element for chip performance and power. A
longer pipeline allows a chip to hit higher clock speeds-although clock
speed brings increases in power consumption-but performance gains don't
always ensue."


Intel 286 and the P5, both had similar pipeline lengths.
What "allowed" them to have such different clock speeds?

Obviously there are far more important considerations involved,
like feature size, manufacturing processes, materials used,
types of gates, types of interconnects, power usage per cycle,
and thermal constraints.

"~misfit~" wrote in message
...
Raymond wrote:
"Adam Webb" wrote in
message ...

funny that now they have compairable pipeline lengths that there CPU
speeds are almost the same..... and infact it shows that INTEL are
the ones with slower silcon (so far) because they are strugging to
run a 65nm CPU at
2.66ghz, when AMD can run a 2.8ghz CPU on 90nm.....


Duh, that's not because of comparable pipeline lenghts. They are
trying to show off the Conroe at much lower power consumption.

Exactly. How much more power consumption do you think was possible with
the
PrescHOT? It was already putting out more heat per square cm than and
electric element on a stove-top. The P4s were and always have been a
dead-end marketing exercise. Getting the mugs cough to buy them because
they were "faster", even though they were inferior design.

Intel went as far as they could down that alley before admiting defeat and
now are making CPUs that are remarkably similar to AMDs approach.

Do you really think that P4s will still be being manufactured in 12
months?
They will go the way of the dinosaurs, they can't evolve, they were a
dead-end.

No love for Pentium 4's netburst architecture here. It was obvious 4 years
ago that something was amiss. Even Intel is in the process of abandoning
it.

Now that you mention Prescott though: hey, it has deeper pipelines than
the Northwoods. And Intel can't release a 4GHz one, still, hardly any
improvement in clock speeds there, despite it's deeper pipelines, 31 vs
20. How is that for deeper pipelines "allowing" for much higher clock
speeds?!?!

So much for that thesis, ahem, "common knowledge"!

No love for Pentium 4's netburst architecture here. It was obvious 4 years
ago that something was amiss. Even Intel is in the process of abandoning
it.

Yet you try and defend it?


Now that you mention Prescott though: hey, it has deeper pipelines than
the Northwoods. And Intel can't release a 4GHz one, still, hardly any
improvement in clock speeds there, despite it's deeper pipelines, 31 vs
20. How is that for deeper pipelines "allowing" for much higher clock
speeds?!?!



Well... the deeper pipeline DOES infact allow higher clocks..... but its
MORE than that, its HEAT output, and since Intels proccess was broken/pushed
to the limit already it really didnt help increasing that pipeline. A
prescott cooled with lets say LN2 will go ALOT further than a Northwood can.


So much for that thesis, ahem, "common knowledge"!


Yes, but it clearly shows that intel are "a node ahead" if they CANT do
ANYTHING right?

there P3 stopped working once it past 933mhz, so they need a quick redesign
to get more mhz because AMD raced off into the 1.4ghz range... So Intel
doubled the pipeline length, and all of a sudden they have a CPU that does
1.8ghz but perform about the same as a 1.2ghz AMD/P3 chip...so NOT efficent,
but for marketing loved it.

So futher down the line, Northwood starts to hit a limit at 3.2-3.4ghz and
they think, lets try that quick fix we used before... that will help out our
"node ahead" sucky silicon, and BOOM, the only thing that went up was power
comsumption and transister count.... Performance went down (per clock), and
the mhz increase was like 400mhz (unless you could supper cool it)...

Cant you see this is why Intel have decided to backtrack to the more
"simple" pipeline lengths? When silicon starts to hit its limit, you really
need to make the cpu more efficent, not LESS efficent like Intel have been
doing for the past 10 years.

--
From Overlag - Adam Webb
www.ajwebb.eclipse.co.uk

Facts are facts though, Intel IS a node ahead of AMD
in feature size. You don't like that? Tough luck, it's
reality. Deal with it!

What is "feature size" and how are they a node ahead? I really want to know
this one

--
From Overlag - Adam Webb
www.ajwebb.eclipse.co.uk

"Adam Webb" wrote in message
...

Yet you try and defend it?

I'm not the one saying the deeper pipelines allow for higher clock
speeds, you are!

So futher down the line, Northwood starts to hit a limit at 3.2-3.4ghz and
they think, lets try that quick fix we used before... that will help out
our
"node ahead" sucky silicon, and BOOM, the only thing that went up
was power comsumption and transister count.... Performance went down
(per clock), and the mhz increase was like 400mhz (unless you could supper
cool it)...

Prescott's deeper pipelines and it's high power consumption aren't
unrelated at all. Instruction sets have an optimal pipeline length. That's
the "common knowlege". When you keep deepening the pipelines for
the same instructions, at some point you not only don't get any further
performance, in fact it goes down, but also you don't get clock speed
increases either, partly because of power consumption from the
increased complexity of deeper pipelines, besides latch overhead and
clocks skew limitations.



http://www.microarch.org/micro36/html/pdf/hartstein-OptimumPower.pdf#search='ibm%20pipeline%20length%2 0power%20research%20Hartstein'

"A theory has been presented of the optimum pipeline
depth for a microprocessor taking into account both power
and performance. It was found that only one optimal
solution exists for this problem and the nature of that
solution has been characterized. For some
power/performance metrics one finds that the optimum
design contains only a single stage in the processor,
whereas for other metrics, including the performance only
metric, a pipelined design results. Consideration of power
in the optimization problem always leads to shorter
pipelines than if power were no consideration."

"Adam Webb" wrote in message
. uk...
Facts are facts though, Intel IS a node ahead of AMD
in feature size. You don't like that? Tough luck, it's
reality. Deal with it!

What is "feature size" and how are they a node ahead? I really want to
know
this one


And you're saying I need educating?!
Well I always do, but not at that level.

130, 90, 65nm, etc refer to the feature size,
ie the size of each circuit (transistor). The sizes
are referred to as nodes. They're a node ahead
because they're already mass producing and selling chips at
the 65nm node, since the start of this year ( actually have
already demonstrated SRAM at 45nm too), while AMD is
still on 90nm, hoping to go to 65nm may be near the end of
this year at best.

What is "feature size" and how are they a node ahead? I really want to
know
this one


And you're saying I need educating?!
Well I always do, but not at that level.

No i just need educating to your use of words, since ive never heard of
THOSE terms.

130, 90, 65nm, etc refer to the feature size,
ie the size of each circuit (transistor). The sizes
are referred to as nodes. They're a node ahead
because they're already mass producing and selling chips at
the 65nm node, since the start of this year ( actually have
already demonstrated SRAM at 45nm too), while AMD is
still on 90nm, hoping to go to 65nm may be near the end of
this year at best.


Ive never heard of "die proccess size" being called feature size, or
node....(ok ok ive heard node...)

Intel may be ahead with 65nm, but do you really see any benifits? there
CPU's are still burning hot and they are below par on performance (HENCE YOU
STARTED THIS THREAD). They have gone backwards on themselfs, back to a
design not unlike AMD's to be able to get performance equal to AMD.

you also probably think that just because intel has DDR2, they are ahead
here too vs amd's DDR1?

--
From Overlag - Adam Webb
www.ajwebb.eclipse.co.uk

Adam Webb wrote:
What is "feature size" and how are they a node ahead? I really want
to know this one


And you're saying I need educating?!
Well I always do, but not at that level.

No i just need educating to your use of words, since ive never heard
of THOSE terms.

130, 90, 65nm, etc refer to the feature size,
ie the size of each circuit (transistor). The sizes
are referred to as nodes. They're a node ahead
because they're already mass producing and selling chips at
the 65nm node, since the start of this year ( actually have
already demonstrated SRAM at 45nm too), while AMD is
still on 90nm, hoping to go to 65nm may be near the end of
this year at best.


Ive never heard of "die proccess size" being called feature size,

In all the processor documents I've read it's called 'fabrication size' or a
variation thereof. I've never heard it called "feature size" until this
thread. I assumed that Raymond is not a native English-speaker and it's a
literal interpretation of the word that he intended to use in his own
language.

or
node....(ok ok ive heard node...)

Node. What can I sat about "node" other than it's use in this context is
patently and completely incorrect, something I took into account when
replying to Ray. Either he's not a native English speaker or he is and
wishes to appear more knowledgable than he is by using words he barely
understands.

http://www.webster.com/cgi-bin/dicti...search&va=Node

Intel may be ahead with 65nm, but do you really see any benifits?
there CPU's are still burning hot and they are below par on
performance (HENCE YOU STARTED THIS THREAD). They have gone backwards
on themselfs, back to a design not unlike AMD's to be able to get
performance equal to AMD.

Excatly what happened. (Did you read that article I linked to?) Intel have
(tacitly) admitted the error of the P4 and have gone back to the design that
the Tualatin P3 was based on, or at least a derivative of it.

you also probably think that just because intel has DDR2, they are
ahead here too vs amd's DDR1?

LOL. Or a "Quad-pumped FSB".
--
~Shaun~

Raymond wrote:
"~misfit~" wrote in message
...
You can either pick then at random from this search:

http://www.google.com/search?sourcei...and+clockspeed
Or here's one I randomly clicked for you:
http://www.eweek.com/article2/0,1895,1935051,00.asp
I quote from it for you:

******************************
"Pipeline length is an important element for chip performance and
power. A longer pipeline allows a chip to hit higher clock
speeds-although clock speed brings increases in power
consumption-but performance gains don't always ensue."


Intel 286 and the P5, both had similar pipeline lengths.

LOL!!! The 286 had a 4-stage pipeline. The Pentium (classic) that I assume
you are refering to when you say "P5" had a 5-stage pipeline. That is 25%
longer. These CPUs were many years apart and, as you say, there are many
other factors to consider, especailly at that time in the evolution of the
CPU. You're talking about ancient history in the accelerated evolution of
the CPU (Relative to almost everything else).

What "allowed" them to have such different clock speeds?

Many years of technological development? Ever hear of Moore's law?

A Humber Hawk and a 2006 Renualt Formula 1 engine both are about 2.5l
capacity but the Humber engine put out 50 horsepower and the Renault puts
out 650. What allows them to have such radically different power outputs?
One factor of architecture (engine capacity/pipeline length) can make a huge
difference to the performance but it isn't the whole picture. However, to
discount it and say it has no effect on "output" is ludicrous.

Obviously there are far more important considerations involved,
like feature size, manufacturing processes, materials used,
types of gates, types of interconnects, power usage per cycle,
and thermal constraints.

Not "far more important" but important none-the-less.
--
~Shaun~