AMD suited for selling 4 core chips as 8 core chips.

On Mon, 9 Nov 2015 03:39:51 +0100, "Skybuck Flying"
wrote:

Another chip company in trouble because of "fraud",

AMD suited for selling 4 core chips as 8 core chips:


"
So, what, exactly, is a core? How much hardware can be shared between
two cores before they cease to be two cores? Who decides?

If consumers get stung by latching onto marketing words that have no
widely agreed meaning, then they deserve what they get.

Sylvia.
"

Fully capable of executing 386 instruction set, or 486 instruction set or
AMD64 instruction set.

"
So ARM processors can't have "cores"?
"

This is about x86/AMD64 cores.

So you're definitions only apply to one product? Rather pointless
(but not surprising).



What NVIDIA's GPU or ARM CPU calls a core is beside the topic as far as I am
concerned, because these buyers are buying these AMD chips to execute
X86/AMD64. So the topic has to be specified to just that, otherwise the
discussion becomes way to broad and meaningless and abstract and has no
practical/consumer value.

The definition of the word is the problem. If people can't agree on
what it means, it becomes a useless word. It's up to you to
understand what the speaker means. That's the whole point. If you
think you got suckered, look no further than the mirror.

32 bit case.
64 bit case.

Preferably without reduced performance characteristics.

"
"Preferably?" Reduced from what? Two cores will always have lower
performance than twice that of a single core. You make no sense, as
usual.
"

You don't seem to make any sense to me... Take a core, take another core,
slam it together on a single chip, done.

You're being circular. What is a core? Why does it have to be a
single chip?

You have exactly the same core... use reduced transistor size/nanometer
process.

Also irrelevant.

And each single core may actually work faster then before.


Nonsense.

It makes no sense to double the number of cores, if the performance is
halved.

Of course no one said any different. You're trying to inflate a straw
man.

How does that create a faster chip ?!?

It doesn't, duh.

Furthermore there is little reason why there would be any performance
degradation whatsoever.

Design it properly.

Define "properly".

Meaning market-conform l1 data chaches, l1 instruction caches, l2 caches.

"
Nope. Caches, particularly L2s, are usually not part of the core.
"

Ok, could be my mistake... I wasn't sure about that...

That certainly doesn't surprise anyone here.

What isn't doesn't mean it couldn't be in future !

That's up to the microarchitect. But making that a definition is
absurd.
"
Again, the definition depends on the microarchitect.

L1 caches have been part of x86 architecture cores for quite some time now.

So what? No one said otherwise. They need not be part of the core,
nor need they be exclusive to one fetch unit. Multi-ported L1s aren't
unheard of.

So a consumer can expect this kind of chip/performance etc.

WTF are you yammering on about now.

And x86 chip not having an L1 cache... would be pretty fraudy.

Perhaps but irrelevant.

The cache is basically why Intel entered the processor bussiness.


No cache, no intel !

What?!!!

First ones seem to be anywhere from 32 KB to 64 KB to 128 KB to 256 KB

"
What does that have to do with anything?
"

It's something for the consumer to expect.

Why should the consumer care? It's a microarchitectural detail.

What's even more odd is that many websites never mention the L1 cache size
which is highly strange/suspicious.

I think my AMD had something like L1 64 KB or maybe even L1 256 KB... not
going to start CPU-z.

As far as I am concerned cache is so important it might as well be included
in the process name:

AMD X2 3800+ 256 KB version !

It used to be, but apparently it's no longer important.

No cache, no nothing !

False, of course.

Another chip company in trouble because of "fraud",

AMD suited for selling 4 core chips as 8 core chips:


"
So, what, exactly, is a core? How much hardware can be shared between
two cores before they cease to be two cores? Who decides?

If consumers get stung by latching onto marketing words that have no
widely agreed meaning, then they deserve what they get.

Sylvia.
"

Fully capable of executing 386 instruction set, or 486 instruction set or
AMD64 instruction set.

"
So ARM processors can't have "cores"?
"

This is about x86/AMD64 cores.

"
So you're definitions only apply to one product? Rather pointless
(but not surprising).
"

No, it applies to the instruction set that the processors are designed for.

Why would discussing anything else be not pointless ?

What NVIDIA's GPU or ARM CPU calls a core is beside the topic as far as I
am
concerned, because these buyers are buying these AMD chips to execute
X86/AMD64. So the topic has to be specified to just that, otherwise the
discussion becomes way to broad and meaningless and abstract and has no
practical/consumer value.

"
The definition of the word is the problem.
"

It's to late to define something to the word "core".

Core is also to abstract. If somebody or something wants to define "core" or
something else... he/she is free to do so especially in light/context of
something else.

Wanna call a ferrari engine a "core" fine with me.

However we are not discussing ferrari engines... we are discussing x86/amd64
engines.

"If people can't agree on what it means, it becomes a useless word."

It's an abstract word, duh.

"It's up to you to understand what the speaker means."

There is no doubt to what AMD means with "core" or anybody else pretending
to sell x86/amd64 executable engines.

A core which can execute the x86/amd64 instruction set.

In that light AMD has deliver 4 cores, not 8, pretty obvious.

Hence what's next Ferrari selling engines with "virtual pistines" or
whatever those things are called lol.

"That's the whole point. If you think you got suckered, look no further
than the mirror."

No. The sucker is AMD... trying to sell something as 8 cores, which are
obviously 4 cores.

Except AMD now calls it "MODULES" LOL.

So what's the future to bring ?

Will we now call it a MODULE from now on ?

It has lameness written all over it.

32 bit case.
64 bit case.

Preferably without reduced performance characteristics.

"
"Preferably?" Reduced from what? Two cores will always have lower
performance than twice that of a single core. You make no sense, as
usual.
"

You don't seem to make any sense to me... Take a core, take another core,
slam it together on a single chip, done.

"
You're being circular. What is a core? Why does it have to be a
single chip?
"

Because it has to be able to execute the logic it was design for.

If it cannot execute the logic it was designed for, throw it in the waste
basket, it's useless.

That's basically how useless these AMD cores are for anybody trying to
design an 8 CORE computer to execute 8 threads.

High chance that some of these 8 threads will stall, thus useless.


You have exactly the same core... use reduced transistor size/nanometer
process.

"
Also irrelevant.
"

Nope.


And each single core may actually work faster then before.

"
Nonsense.
"

Exactly the opposite.


It makes no sense to double the number of cores, if the performance is
halved.

"
Of course no one said any different.
"

You said reduced performance.

Why would two cores have reduced performance ?

"You're trying to inflate a straw man."

.... please keep discussion technical.

How does that create a faster chip ?!?

It doesn't, duh.

Furthermore there is little reason why there would be any performance
degradation whatsoever.

Design it properly.

Define "properly".

No performance degradation.

Here's a hint, don't share, duplicate everything.

Meaning market-conform l1 data chaches, l1 instruction caches, l2 caches.

"
Nope. Caches, particularly L2s, are usually not part of the core.
"

Ok, could be my mistake... I wasn't sure about that...

"
That certainly doesn't surprise anyone here.
"

It will surprise you in the future when L2 cache is integrated. It may
already have been. Where it is located is not the most relevant part.

The most relevant part is 4 not 8. Once it has 8 we can discuss it's
location further.

The assumption for now is 8 caches will perform better than 4 caches.

Even if those 4 caches were closer to the chip... and those 8 caches were
further away from the chip... the distance would not be that great... and
the 8 will probably perform faster. Ha-Ha ! =D

If not integrate them next time !

What isn't doesn't mean it couldn't be in future !


"
That's up to the microarchitect. But making that a definition is
absurd.
"

No it's not... I am aware that this L2 Cache is on chip... if it were
anywhere else it would not matter much and would not be called a cache but
just main ram.

Here is a picture for you:

https://www.google.nl/search?q=l2+ca...Ri-e4pJlpXM%3A


Question that remains is:

Should a core have it's own/private access to L2 cache... or should it be
shared...

This is a strange question to ask... and depends more on heuristics and
actually execution tendenacies and cache hit ratios and cache design.

L1 cache could hold frequent data/instructions.

L2 cache could hold less frequet data/instructions and prevent storage of
frequent data/instructions which is already held by L1, thus bypassing
those.

L3 cache can hold even less frequent data/instructions and so on.


L1 = 100x speed up
L2 = 10x speed up
L3 = 5x speed up

Maybe something like that... for actual speed ups check chip and memory
specs.

"
Again, the definition depends on the microarchitect.

L1 caches have been part of x86 architecture cores for quite some time now.

"
So what? No one said otherwise. They need not be part of the core,
nor need they be exclusive to one fetch unit. Multi-ported L1s aren't
unheard of.
"

For good performance each core will need it's own L1 cache.

Anything else can be considered garbage.


So a consumer can expect this kind of chip/performance etc.

"
WTF are you yammering on about now.
"

All intel/AMD chips include L1 cache per core, go check the specs.

It's part of what is to be considered an x86/amd64 core, what this
discussion is about.

And x86 chip not having an L1 cache... would be pretty fraudy.

"
Perhaps but irrelevant.
"

No not irrelevant, spot on.

Next time AMD tries to sell a 16 core x86/AMD64 processor without L1 caches,
they'll be sued again, and again, and again.

Unless they very clearly market it is: A processor without L1 caches, and
therefore completely useless performance-wise lol.

The cache is basically why Intel entered the processor bussiness.

No cache, no intel !


"
What?!!!
"

Exactly like I said.

No cache, no intel.

If intel starts selling chips tomorrow without cache, it's end of bussiness
for them.

First ones seem to be anywhere from 32 KB to 64 KB to 128 KB to 256 KB

"
What does that have to do with anything?
"

It's something for the consumer to expect.

"
Why should the consumer care? It's a microarchitectural detail.
"

No it's not a detail, it's the only reason why intel exists.

Otherwise anybody's chip would just be as good.

What's even more odd is that many websites never mention the L1 cache size
which is highly strange/suspicious.

I think my AMD had something like L1 64 KB or maybe even L1 256 KB... not
going to start CPU-z.

As far as I am concerned cache is so important it might as well be included
in the process name:

AMD X2 3800+ 256 KB version !


"
It used to be, but apparently it's no longer important.
"

It is important, ask NVIDIA which now introduces larger L1 caches for the
GPUs to prevent bottlenecks.

No cache, no nothing !

"
False, of course.
"

Again, see recent GPU design !

No cache=might as well call it a old-fashioned GPU lol.

Bye,
Skybuck =D

On Sun, 08 Nov 2015 17:20:04 GMT
(Anton Ertl) wrote:

rickman writes:
I haven't looked at AMD recently, but some years ago they fell
behind in the process technology by more than a year. At that
point, I realized they could never compete again with Intel. In the
old days, they were around six months behind in process technology
which could be overcome by good architecture design. More than a
year is too much with both speed advantages as well as cost
advantages.

There are no speed advantages. Note that the fastest 14nm Broadwell
is quite a bit slower at 3.3/3.7GHz than it's 22nm Haswell brother
(4.0/4.4GHz), and the next-generation 14nm Skylake is supposed to be
available at 4.0/4.2GHz, but apparently Intel's 14nm process is barely
up to the task, because even now, 3 months after the chip was
officially released, it is available only in very small numbers.

broadwell is nowhere to be seen, but I see all shops here have
skylakes...


Comparing the 32nm and the 22nm process, the 32nm Sandy Bridge was
available at 3.5/3.9 GHZ (if we ignore the 130W and 150W variants),
and its 22nm Ivy Bridge brother at the same 3.5/3.9GHz. The Haswell
(refresh) is a little faster (see above), but has a revised design.

So no, there is no performance advantage (have not really been for
about 10 years). There are probably cost advantages to using a
smaller process, though.

Well, since sandy bridge, intel didn't step up in performance in major
way but there are improvements here and there.
What is interesting is hype around AMD Zen, which will supposedly bring
performance on par with intel.
I wish that would be success.


- anton

On Sunday, November 8, 2015 at 1:09:59 PM UTC+8, Sylvia Else wrote:
On 8/11/2015 1:19 PM, Skybuck Flying wrote:
Another chip company in trouble because of "fraud",

AMD suited for selling 4 core chips as 8 core chips:


So, what, exactly, is a core? How much hardware can be shared between
two cores before they cease to be two cores? Who decides?


They have 8 integer cores but 4 FPUs (also a 4 of a few other components).
AMD fanboys claimed that the FPUs were very wide and could actually be
divvied up to do 2 operations. Seems to be clutching at straws.
Although for most applications, 8 number-crunchers are not required.
The problem was that Bulldozer was no better than K10 at some things.
People who bought them want somebody to blame.
Hopefully the Zen CPU will see it off.

On Sunday, November 8, 2015 at 4:08:18 PM UTC+8, rickman wrote:

The only reason they are even around is because Intel lost an
anti-competitive lawsuit and paid AMD about $2 billion if I recall. $2
billion doesn't last long in the semi business. It's all gone, as are
many of the AMD fabs and now they have no lever to even catch up with
Intel.

Also there are patent royalties between Intel, AMD and VIA.
When these patents expire ....

Melzzzzz writes:
On Sun, 08 Nov 2015 17:20:04 GMT
(Anton Ertl) wrote:
There are no speed advantages. Note that the fastest 14nm Broadwell
is quite a bit slower at 3.3/3.7GHz than it's 22nm Haswell brother
(4.0/4.4GHz), and the next-generation 14nm Skylake is supposed to be
available at 4.0/4.2GHz, but apparently Intel's 14nm process is barely
up to the task, because even now, 3 months after the chip was
officially released, it is available only in very small numbers.

broadwell is nowhere to be seen, but I see all shops here have
skylakes...

According to
http://geizhals.at/?cat=cpu1150&asuch=&bpmax=&v=l&hloc=at&plz=&dist=& filter=aktualisieren&mail=&sort=p&xf=2_14,
10 shops in Austria have the Core-i7-5775C (Broadwell) in stock.

According to
http://geizhals.at/?cat=cpu1151&asuch=&bpmax=&v=l&hloc=at&plz=&dist=& filter=aktualisieren&mail=&sort=-eintr
16 have the Core-i5 6500 (Skylake 3.2/3.6GHz) in stock, so yes, some
Skylakes are available, but for the Core i7-6700K (4.0/4.2GHz), only
one shop has it in stock (and holds on to the ones that they have by
asking 40% more than you pay for the Core i7-4790K (Haswell
4.0/4.4GHz)).

By contrast, 19 shops have the Core i7-4790K in stock
http://geizhals.at/?cat=cpu1150&asuch=&bpmax=&v=l&hloc=at&plz=&dist=& filter=aktualisieren&mail=&sort=-eintr&xf=3_4000.

So yes, Skylakes are in shops, but the scarcity of the 6700K suggests
that only few of the produced Skylakes come out in that bin, while
fast Haswells are not scarce. So it appears that it is easier to make
fast 22nm CPUs than fast 14nm CPUs.

What is interesting is hype around AMD Zen, which will supposedly bring
performance on par with intel.
I wish that would be success.

Me, too, but given that we hear little technical stuff about Zen makes
me suspicious. When K8 came out, we heard a lot about the cool
features that would give it an edge (and, as it turned out, gave it an
edge: AMD64, integrated memory controller, and hypertransport); for
Zen we hear no technical features. Let's hope that that's just newer,
secretive marketing people, and that the Zen will be competetive.

- anton
--
M. Anton Ertl Some things have to be seen to be believed
Most things have to be believed to be seen
http://www.complang.tuwien.ac.at/anton/home.html

Anton Ertl wrote:

There are no speed advantages.

But some of the Broadwells support the limited form of transactional
memory, which makes it possible to greatly simplyfy the high-performance
parallel algorithms. What sed to be next to impossible is now quite
easy. E.g. even such a simple thing as a doubly-linked list was so hard
to do properly that it earned Mr. Valois a Ph.D degree. With TSX it is a
no-brainer.

Best regards, Piotr

On Mon, Nov 09, 2015 at 05:12:18PM +0100, Piotr Wyderski wrote:
Anton Ertl wrote:

There are no speed advantages.

But some of the Broadwells support the limited form of transactional
memory, which makes it possible to greatly simplyfy the high-performance
parallel algorithms. What sed to be next to impossible is now quite
easy. E.g. even such a simple thing as a doubly-linked list was so hard
to do properly that it earned Mr. Valois a Ph.D degree. With TSX it is a
no-brainer.

So they have TSX working now?

How useful it is seems to be limited to the depth of the elision
buffer(s). Documentation was not proliferate when I looked into it a
year or so ago, and no hard numbers were given for any implementation.
But as I understand it the core maintains a list of memory addresses
which are modified during a transaction and detects the case where
another cores access conflicts with the transaction. As buffer memory
for this case must be finite it seems of use primarily in cases where
modifications are made to small data structures. However, since we
don't seem to know how deep the buffers are it seems reasonable to
restrict the use of TSX/HLE to really simple structures. Performance
could suffer otherwise.

I am currently waiting to get my hands on working hardware,
preferably a laptop of some sort.



--
If the NLP should give you a headache, take two pills (at least) and
do not call me in the morning.

"SC Tom" wrote in message ...



"Mr. Man-wai Chang" wrote in message
...
On 11/8/2015 10:19 AM, Skybuck Flying wrote:
Another chip company in trouble because of "fraud",

AMD suited for selling 4 core chips as 8 core chips:

http://legalnewsline.com/stories/510...ion-of-new-cpu


I am happy to see these lawsuits.


There is another pending lawsuit against AMD on APU:

AMD Sued for Overestimating APU Success to Investors
http://www.techpowerup.com/196941/am...investors.html


"
Now THAT one I considered to be a frivolous lawsuit. You pays your money,
you takes your chances :-) Doesn't everyone who is looking for investors
"

AMD basically does it again with zen, claiming 40% more instructions per
clock.

What if you wait for this processor and then it turns out all to be a lie ?!
Would you feel had/cheated/lied too ?!

Bye,
Skybuck.

"Skybuck Flying" wrote in message
.. .


"SC Tom" wrote in message ...



"Mr. Man-wai Chang" wrote in message
...
On 11/8/2015 10:19 AM, Skybuck Flying wrote:
Another chip company in trouble because of "fraud",

AMD suited for selling 4 core chips as 8 core chips:

http://legalnewsline.com/stories/510...ion-of-new-cpu


I am happy to see these lawsuits.


There is another pending lawsuit against AMD on APU:

AMD Sued for Overestimating APU Success to Investors
http://www.techpowerup.com/196941/am...investors.html


"
Now THAT one I considered to be a frivolous lawsuit. You pays your money,
you takes your chances :-) Doesn't everyone who is looking for investors
"

AMD basically does it again with zen, claiming 40% more instructions per
clock.

What if you wait for this processor and then it turns out all to be a lie
?! Would you feel had/cheated/lied too ?!

Only if I bought one. In the first article, it was AMD touting how great the
APU was before it was even released (IIRC. I didn't reread the article) so
they could get more development money from the investors. I think in the
second case, it's more a case of false advertising.
--
SC Tom