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#21
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Adam Webb wrote:
[...] Oh and about the locks: Intel P3 and P4s can not be unlocked (ES dont count) A64s cant go up on multiplyers, just down. FX's are totaly unlocked. 2003 week 39 XP's are unlockable, but alittle harder than before 2003 week 39 XP's are not unlockable. Show me a post week 39 desktop CPU running at anything but the default multiplier on a NF2. Or the cache being enabled on a post week 39 Duron. You can get around the L3 lock on some chipsets by enabling PowerNow, but you certainly can't unlock the chip. 2003 week 39 XP's are unlockable with ease. 2003 week 39 XP's aren't locked Well, I suppose the Palomino is if you want to go back that far (and is easily unlockable as you noted). -- Michael Brown www.emboss.co.nz : OOS/RSI software and more Add michael@ to emboss.co.nz - My inbox is always open |
#22
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David Maynard wrote in message ...
James Hanley wrote: David Maynard wrote in message ... James Hanley wrote: it seems to me that nobody needs a high fsb. since they could just push the multiplier really high. I can see the greatness of ddr since the same speed processor can read/write twice as much per cycle. (i assume that the cpu has to be ddr to receive or write double) How is it you can see the benefit to 'read/write twice as much per cycle' yet not see any benefit to more of the cycles? Obviously I see the benefit of more cycles. What do you think I meant when I said "push the multiplier really high". That increases the cycles per second. No, increasing the multiplier does NOT increase the FSB cycles. I knew that, it increases cycles per second, but just CPU cycles. So yeah. I just realised that: Increasing the multiplier increases CPU cycles (not FSB cycles of course). Increasing the FSB increases both - that is what hadn't occurred to me :P So if the system supported it(processor was unlocked and very underclocked) doubling the FSB is better than doubling the current value of the multiplier. It's better to have a faster FSB(thus increasing CPU cycles and FSB cycles) than to have a slower FSB and a larger multiplier, which would only increase CPU cycles. More CPU cycles -- more CPU bandwidth More FSB cycles -- more FSB bandwidth I suppose bandwidth and throughput are the same thing thanks for your response |
#23
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David Maynard wrote in message ...
James Hanley wrote: David Maynard wrote in message ... James Hanley wrote: snip Just how fast do you think it can get instructions to execute if you turned the FSB down to 1 Hz, eh? It doesn't make any difference how fast the CPU can execute instructions if you can't feed it the instructions to execute. I was wrong on that one. thanks for your response and the RAM multiplies the FSB. No. It doesn't 'multiply' the FSB. It operates at the memory bus clock rate. Ok. The thing that made me think it multiplied the FSB was a)If my memory serves me correctly, Si Sandra lists alongside the actual and effective memory clock speeds, a multiple, which seems to work out the actual memory speed correctly if taken as a multiple of the actual fsb speed. b)the FSB is often called the base clock, since - i've been told - all clocks in the system are derived from it - thus, I thought maybe the memory clock speed was derived from it too (with a multiplier). I can accept that si sandra is being misleading and that the clock is independent, since the BIOS does not have a setting to change any 'memory multiplier'. Maybe the thing I had been told that "all clocks in the system are derived from the base clock - fsb clock" is wrong, and should read "all clocks in the system are synchronized with the base/fsb clock" So the FSB has its own clock, the Synchronous Memory has its own clock. But the PCI, AGP and CPU have a derived clock? (I make this statement by looking at where in the bios i can set the multiplier) thanks |
#24
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James Hanley wrote:
David Maynard wrote in message ... James Hanley wrote: David Maynard wrote in message ... James Hanley wrote: it seems to me that nobody needs a high fsb. since they could just push the multiplier really high. I can see the greatness of ddr since the same speed processor can read/write twice as much per cycle. (i assume that the cpu has to be ddr to receive or write double) How is it you can see the benefit to 'read/write twice as much per cycle' yet not see any benefit to more of the cycles? Obviously I see the benefit of more cycles. What do you think I meant when I said "push the multiplier really high". That increases the cycles per second. No, increasing the multiplier does NOT increase the FSB cycles. I knew that, it increases cycles per second, but just CPU cycles. So yeah. I just realised that: Increasing the multiplier increases CPU cycles (not FSB cycles of course). Increasing the FSB increases both - that is what hadn't occurred to me :P It isn't because of increasing 'both': that's a matter of the CPU multiplier being locked, or not. A 1.83 Ghz processor on a 333 Mhz FSB will perform better than a 1.83 Ghz processor running on a 266 Mhz FSB, whether you accomplish the test by buying two different processors or using one with an adjustable multiplier. It isn't as dramatic an improvement as changing the CPU speed (multiplier) partly because it's offset by the L2 cache. So if the system supported it(processor was unlocked and very underclocked) doubling the FSB is better than doubling the current value of the multiplier. It depends on what you mean by that. If you mean taking a processor of speed X on FSB Y and *either* doubling the FSB *or* doubling the CPU speed then no, doubling the FSB, alone, is not as good as doubling the CPU speed, alone. If you mean, as I suspect you do, doing one or the other to end up with the same CPU speed after it's all said and done, then yes, because a processor at speed X will perform better if it also has a faster FSB (within reason). Let's put it to a practical example. I have an unlocked mobile Barton 2400 on a DFI motherboard that let's me adjust everything, so I can run it overclocked to 2.2 Ghz at 266 Mhz FSB, 333 Mhz FSB, or 400 Mhz FSB (if I stay at 'standard' FSBs) by adjusting the multiplier accordingly. Which do you think will give me the best performance? It's better to have a faster FSB(thus increasing CPU cycles and FSB cycles) than to have a slower FSB and a larger multiplier, which would only increase CPU cycles. You're mixing apples and oranges. In one case you alter the CPU speed but not in the other. That might be a constraint imposed when using a locked multiplier CPU but it confuses the matter that increasing the FSB, alone, improves processor performance because more instructions can get to it per second. More CPU cycles -- more CPU bandwidth No. More 'CPU cycles' (all else being equal) --- more instructions executed per second, assuming it can GET the instructions at that rate. More FSB cycles -- more FSB bandwidth I suppose bandwidth and throughput are the same thing Bandwidth is capability and throughput is what is actually going through. thanks for your response |
#25
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James Hanley wrote:
David Maynard wrote in message ... James Hanley wrote: David Maynard wrote in message ... James Hanley wrote: snip Just how fast do you think it can get instructions to execute if you turned the FSB down to 1 Hz, eh? It doesn't make any difference how fast the CPU can execute instructions if you can't feed it the instructions to execute. I was wrong on that one. thanks for your response and the RAM multiplies the FSB. No. It doesn't 'multiply' the FSB. It operates at the memory bus clock rate. Ok. The thing that made me think it multiplied the FSB was a)If my memory serves me correctly, Si Sandra lists alongside the actual and effective memory clock speeds, a multiple, which seems to work out the actual memory speed correctly if taken as a multiple of the actual fsb speed. b)the FSB is often called the base clock, since - i've been told - all clocks in the system are derived from it - thus, I thought maybe the memory clock speed was derived from it too (with a multiplier). Well, more like 'system clock' but it, itself, is 'multiplied' from a lower clock. The point I was making is that there is no 'multiplier' *in* memory sticks, as there is with the processor. Memory simply runs at the speed of the bus it's on. Typically the memory bus operated at the same speed as the FSB but modern northbridge implementations often allow for running it at some 'ratio' to the FSB. That 'not the same as FSB' memory bus clock is generated by the northbridge and it's not a 'memory' clock, as in the sense of the CPU, it's a memory *bus* clock. "Multiplier" has multiple (pun) meanings. One refers to a mathematical relationship. I.E. 266 is 2 times 133. The other refers to how that number is physically implemented in the hardware. While DDR is 'x2' SDR, in terms of theoretical bandwidth, it is not done by 'multiplying' a 133 Mhz clock to get a 266 Mhz clock. It is accomplished by sending data on both the leading and trailing edges of the same, as SDR, clock. I.E. | 1 cycle | ____ ____ | | | | clock --- ---- --- | | | | SDR Data | Data | | | | | DDR Data Data Data Data The clock speed is the same and there is no 'multiplier' creating a new, 'double speed' clock. Yet the effective speed is '2x' because it sends the data twice per clock. The CPU *does* have a 'multiplier'. I.E. __________________Processor Package_______________ | | System | | clock -- CPU pin -- phase lock loop -- internal CPU clock | | ^ | | | | | multiplier | |_________________________________________________ _| The internal CPU clock operates at xMultiplier the external clock. I can accept that si sandra is being misleading and that the clock is independent, since the BIOS does not have a setting to change any 'memory multiplier'. I'm not sure what 'significance' you're trying to ascribe to 'derived' vs 'independent'. Maybe the thing I had been told that "all clocks in the system are derived from the base clock - fsb clock" is wrong, and should read "all clocks in the system are synchronized with the base/fsb clock" It's an oversimplification that ignores what part of the system is doing what and why. So the FSB has its own clock, the Synchronous Memory has its own clock. It's both 'their own clock' and derived. But the PCI, AGP and CPU have a derived clock? (I make this statement by looking at where in the bios i can set the multiplier) thanks |
#26
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James Hanley wrote:
"Michael Brown" wrote in message ... James Hanley wrote: "Adam Webb" wrote in message . .. it seems to me that nobody needs a high fsb. since they could just push the multiplier really high. you cant push the multiplier high because its locked on most modern CPU's nobody on an overclocking forum should be saying "oh no, the multiplier is locked, what am I going to do" Just like no technician is going to say, oh no, the file is 'hidden' what am I going to do. Better analogy: the technician saying "oh no, someone has wiped the disk then turned it into slag in a blast furnace, what am I going to do?". Given that people have spent close to 6 years trying to unlock Intel CPUs (no success) and about 1 year trying to unlock locked AMD chips (no success), 6 years? - but there are loads of articles on unlocking AMD chips, i'm sure I think I saw one for the AMD XP 1500+, that's less than 6 years old isn't it? You didn't pay attention to what he wrote. The 6 years was with regard to Intel processors and he said "about 1 year" with respect to AMD processors. The general view is that both companies are using fuses inside the die, which can't be altered once set. *******s. It all started when unscrupulous resellers simply remarked lower speed chips to higher speed ones so they could profit by selling cheap processors at the higher price. So how can anybody overclock? Just by upping the FSB to whatever the mobo supports? Correct. Except that Intel has now tried to lock the FSB. I suppose that a CPU will have a built in multiplier at a fixed value, and will assume a certain FSB speed. So if the FSB is lower then it's underclocked. If it's higher then it's overclocked. Correct Or does it not even derive its clock by multiplying the FSB clock? It has no other choice. Would most people have the FSB at the highest setting suported anyway, and they'd have a CPU that supports it, so how would they overclock? (they cna't up the FSB clock because it's already on the highest, and they can't up the multiplier because it's properly locked) That's why overclockerr's PICK the best processor to overclock, and a motherboard that provides the ability to do so. snip |
#27
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2003 week 39 XP's are unlockable, but alittle harder than before
2003 week 39 XP's are not unlockable. Show me a post week 39 desktop CPU running at anything but the default multiplier on a NF2. Or the cache being enabled on a post week 39 Duron. You can get around the L3 lock on some chipsets by enabling PowerNow, but you certainly can't unlock the chip. oooooh they not unlockable at all? i thought there was a hardway to do it? i dunno my last XP was a week 20 something ;-) -- From Adam Webb, Overlag www.tacticalgamer.com CS:SOURCE server now active --- Outgoing mail is certified Virus Free. Checked by AVG anti-virus system (http://www.grisoft.com). Version: 6.0.786 / Virus Database: 532 - Release Date: 30/10/2004 |
#28
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David Maynard wrote:
[...] The CPU *does* have a 'multiplier'. Oooo, you're lucky you put that in quotes :P __________________Processor Package_______________ | | System | | clock -- CPU pin -- phase lock loop -- internal CPU clock | | ^ | | | | | | | divider ------------/ | |_________________________________________________ _| Yes, I know I'm being picky -- Michael Brown www.emboss.co.nz : OOS/RSI software and more Add michael@ to emboss.co.nz - My inbox is always open |
#29
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Adam Webb wrote:
2003 week 39 XP's are unlockable, but alittle harder than before 2003 week 39 XP's are not unlockable. Show me a post week 39 desktop CPU running at anything but the default multiplier on a NF2. Or the cache being enabled on a post week 39 Duron. You can get around the L3 lock on some chipsets by enabling PowerNow, but you certainly can't unlock the chip. oooooh they not unlockable at all? i thought there was a hardway to do it? i dunno my last XP was a week 20 something ;-) The "hard way" is enabling PowerNow on the CPU, and is what people are calling psuedo-unlocking of the CPU. It doesn't work on NF1/NF2 chipsets, and is only really of use when you've maxed your FSB without maxing out the CPU (for example running a Barton 2500 at a good speed on a board that only works up to a FSB of 150MHz or so). There actually isn't one multiplier setting on the Athlon XP, but two. There's the startup multiplier, and the maximum multiplier. When it's powered on, the CPU reads the startup multiplier and uses this setting. In a desktop CPU (which doesn't have PowerNow), this is where it ends. You're stuck with the startup multiplier until you reset the chip. On a mobile CPU (or rather, any CPU with PowerNow) things are a bit better. Once the CPU has been started, you can transition to any multiplier less than the maximum one, as long as the chipset supports PowerNow transitions (pretty much all do except the NF1/NF2). What AMD did was not "locking the multiplier" per se, but rather storing the L3 (and L2, but that's a different thread) bridge configuration inside the die. So instead of reading it off the bridges/BP_FID pins on boot, it reads it from its internal storage. Noone has figured out how to talk to this internal storage, and there's a ery high chance that it's been closed off to the outside world. For example, there's quite possibly a bit in the storage that says "ignore any attempt to write into the storage". You can't change the multiplier (because the "write protect" bit has been set), and you can't reset the bit (since this would require writing to the storage, which is denied). Or alternatively, if a bit can only be "set", then there could be pairs of bits. If both bits are set, then something has been tampered with and the CPU would refuse to start. Again, this completely prevents any changing of the settings. Sooooo, in a locked AMD chip, there's no way to set the startup multiplier, and if the CPU doesn't have PowerNow support, then there's no way to change the multiplier at all. All K7 BIOSes that I've seen do multiplier adjustments through the startup multiplier (messing with the BP_FID pins), so once you lock the L3 bridge configuration, you disable the ability of all BIOSes to use anything but the stock startup multiplier. The "psuedo-unlock" involves activating PowerNow, and setting the maximum multiplier to something good. Then, you can make the chip operate at any multiplier that you like, though the chip still boots up at the original multiplier. Currently, the die-storage is only used in desktop CPUs. However, it's clear that there's nothing stopping AMD from using it on mobile CPUs as well. Mobile systems acheive power saving through PowerNow transitions, not manipulation of the startup multiplier, so whether the L3 configuration is locked or not makes no difference to them. It's also obvious that there's nothing (except possibly technological reasons, such as a limited amount of data that can be stored in the die) stopping AMD from putting all the bridges inside the die. It's exactly what they do for the K8 chips. It just means that a) You can't adjust the startup multiplier b) You can't adjust the maximim multiplier c) You can't enable or disable PowerNow None of these restrictions will stop a mobile CPU from working correctly in a mobile system. Restrictions "a" and "b" combine to stop the chip running at anything over the stock multiplier. Restriction "c" means that a desktop CPU will ONLY operate at the startup multiplier and nothing else. What do we have today? Well, mobile CPUs have no restrictions. This is good, and lets hope it stays this way. Desktop CPUs have restriction "a", which means that as long as your board supports PowerNow, you have a bit more freedom as to how you run your CPU. However, if you have a NForce chipset (which don't support PowerNow transitions), you effectively have restriction "c" imposed. Which means that on an NF board, a desktop CPU will only operate at it's stock startup multiplier. -- Michael Brown www.emboss.co.nz : OOS/RSI software and more Add michael@ to emboss.co.nz - My inbox is always open |
#30
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Michael Brown wrote:
David Maynard wrote: [...] The CPU *does* have a 'multiplier'. Oooo, you're lucky you put that in quotes :P It wasn't 'luck'. I use single quotes to denote irony, the 'colloquial gist' (sometimes akin to irony), or non literal use of a word/phrase. In that case I was indicating the colloquial gist of the function and not necessarily a literal. __________________Processor Package_______________ | | System | | clock -- CPU pin -- phase lock loop -- internal CPU clock | | ^ | | | | | | | divider ------------/ | |_________________________________________________ _| Yes, I know I'm being picky Technically what you did was break the block diagram down further and show how the phase lock loop accomplishes the multiply. Both are appropriate, depending on what one is trying to convey: how the multiplier works or simply that there's a multiplier. -- Michael Brown www.emboss.co.nz : OOS/RSI software and more Add michael@ to emboss.co.nz - My inbox is always open |
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