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#41
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chrisv wrote:
On Thu, 2 Oct 2003 21:54:07 +0100, "Ben Pope" wrote: chrisv wrote: If you want to argue that a "2400 baud" modem should always be desribed "properly" as a "600 baud modem with quadrature amplitude modulation", then I'd say you're a freakin' nutcase. 2400bps would fine though, wouldn't it? Tell us, how exactly would you say that to a lay person? Would you say "2400 bee pee ess", or "2400 bits per second"? You see, there's a reason "2400 baud" become nomenclature - it's quick, easy, and it works, despite not being "technically correct". I would quite happily say to somebody "I have a 56K modem". I wouldn't give the units. I certainly wouldn't give the incorrect units. That why the people that know what it means don't need to ask and those that don't know, they probably don't care. If they really want to know, then I would make a judgement call as to whether to say that it;s faster than a 33.6 modem, or it's 56K bits per second. If people use the correct units, there would be no confusion. It's the poeple that use incorrect units, incorrect terminology and incorrect reasoning that cause confusion. I'm also curious as to what, exactly, you would say to a lay person regarding the "800MHz FSB"? Because if you have a way to describe it, that effectively communicates what's going, without being too technical for anyone but a computer hardware geek, I may use your suggestion. 800 million transfers per second? Thats effectively what you're getting right? You're reading up to 800 Million values from memory and throwing them at the cpu within one second. I think thats less technical and meaningful then a TLA. As you say, most people don't know what a bus is, or how it can be the front and the side at the same time. Ben -- I'm not just a number. To many, I'm known as a String... |
#42
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On Fri, 03 Oct 2003 03:19:14 GMT,
(The little lost angel) wrote: On Thu, 02 Oct 2003 15:32:46 -0500, chrisv wrote: There's nothing wrong with the "800MHz FSB" abbreviation. I use it myself, and not to deceive, to communicate. It's a lot easier than saying "200MHz quad-data-rate" and then having to explain what the hell that means to someone who probably couldn't care less. In my experience doing sales, people who ask the question actually are somewhat interested in knowing and many do think about the new information. The problem is most people also never get to asking the question as they usually had already decided, it's a Pentium so it must be good, nevermind what numbers. Half the people I've met can't quite get past the "bada-ba-bing" Intel-Inside jingle : Anyway, I'm getting quite confused by this thread to be honest. I had always thought the 800Mhz was the result of adding 2 channels, 4x data rate and 100Mhz clock. But you guys are giving me the impression it's 4x data rate, 200Mhz clock... the Intel spec sheet says the P4 blah blah processor 400Mhz, 533Mhz, 800Mhz blah blah either 100Mhz or 133Mhz bus. The P4 uses a two signals, each sending data on both rising and falling edge of the clock. So, for the new 'C' P4s with their "800MHz" bus speed, they are using a 200MHz clock on the bus. 200MHz, 2 signals/pin and two bits/clock cycle for each signal. The end result is bandwidth equivalent to a plain-jane 800MHz bus. So did the engineering department forgot to tell the marketing/publishing department they have a 200Mhz bus now, or is it the other way round??? It's a 200MHz clock now. I'm sure that engineering knows that, though I've never been able to figure out just what the marketing department was after! Maybe that's what I studied engineering at university instead of business or marketing : ------------- Tony Hill hilla underscore 20 at yahoo dot ca |
#43
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On Fri, 03 Oct 2003 10:22:08 +0000, The little lost angel wrote:
On Fri, 3 Oct 2003 09:46:50 +0100, "Ben Pope" wrote: So a 3200+ would be about 50% faster than 2100+, right? And 3200+ would be about as fast as a 3.2GHz P4 cough - we're talking ish here, and on average, not on specific benchmarks So are you talking about the numbers representing end result? Then AMD is not misleading. Are you talking about using correct Units? AMD is not misleading (since they don't use any :-) Heehee, I'm talking about they are equally deceptive/useful. We know the XP3200 isn't really 50% faster than an XP2100, just as the 800 Msomething FSB isn't 50% faster. So I just think calling the XP rating deceptive and NOT calling the 800Mega-something FSB for the same is just a tad on the side of hypocrisy? :P While I think they rated the XP 3200+ a little high, for comparison to the P4 3200 it's pretty close, and it's actually faster than the P4 3200 in some benchmarks. OTOH, the 800MHz Intel uses is 4 times faster than the actual bus speed of 200MHz. Now which one is deceptive? Either we say that they are both deceptive or that they are both sorta useful for relatively comparisons. Not one is useful and the other is only deceptive. Note I'm not talking about how accurate they might be! :P Go back to the Intel NG. I'm sure they'll buy this crap. -- Abit KT7-Raid (KT133) Tbred B core CPU @2400MHz (24x100FSB) http://mysite.verizon.net/res0exft/cpu.html |
#44
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On Fri, 03 Oct 2003 08:50:49 -0500, chrisv wrote:
On Fri, 3 Oct 2003 09:52:43 +0100, "Ben Pope" wrote: I would equally argue against AMD if their figures were misleading. I'm not a fan of the fact that they call their FSBs "333" and "400" but since they don't append MHz they're not misrepresenting anything. And you don't think the MHz is implied. Unbelievable. I'd have to agree with you here. While not technically wrong, it is deceptive. Just not as blatant as Intel with the MHz on the end. -- Abit KT7-Raid (KT133) Tbred B core CPU @2400MHz (24x100FSB) http://mysite.verizon.net/res0exft/cpu.html |
#45
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On Fri, 03 Oct 2003 08:44:12 -0500, chrisv wrote:
I'm also curious as to what, exactly, you would say to a lay person regarding the "800MHz FSB"? Because if you have a way to describe it, that effectively communicates what's going, without being too technical for anyone but a computer hardware geek, I may use your suggestion. 200MHz FSB QDR for Intel 200MHz FSB DDR for AMD Then I'd explain QDR/DDR if they didn't understand it. I guess Intel uses Quad Pumped instead of QDR (Quad Data Rate), which is my own terminology. -- Abit KT7-Raid (KT133) Tbred B core CPU @2400MHz (24x100FSB) http://mysite.verizon.net/res0exft/cpu.html |
#46
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People, this isn't a computer store. Most people come to this newsgroup
wanting info. Outside of the ng's I couldn't care less how you designate the the Intel or AMD fsb speed. But in here, it should be accurate for the benefit of the people that come here to learn something. That's why I hate to see references to marketing BS here. -- Abit KT7-Raid (KT133) Tbred B core CPU @2400MHz (24x100FSB) http://mysite.verizon.net/res0exft/cpu.html |
#47
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On Fri, 03 Oct 2003 03:19:14 GMT,
(The little lost angel) wrote: Anyway, I'm getting quite confused by this thread to be honest. I had always thought the 800Mhz was the result of adding 2 channels, 4x data rate and 100Mhz clock. But you guys are giving me the impression it's 4x data rate, 200Mhz clock... the Intel spec sheet says the P4 blah blah processor 400Mhz, 533Mhz, 800Mhz blah blah either 100Mhz or 133Mhz bus. All the 4x data rate buses, AGP included, use double speed clocking and DDR signalling. For The P4's "800MHz" FSB, the base bus clock rate is 200MHz. The address bus is the 200MHz with DDR signalling. The data bus strobe clock is 400MHz differential(IIRC), source synchronous with DDR signalling to get the 800 number. For the 64-bits, there are actually 4 separate 16-bit sub-buses with their own strobe clocks and it uses something called Dynamic Bus Inversion, which means that if less than 8 of the 16 bits are 1, it inverts all 16 signals on the fly. So did the engineering department forgot to tell the marketing/publishing department they have a 200Mhz bus now, or is it the other way round??? Seems like the former... or the marketing dept. just doesn't understand. Rgds, George Macdonald "Just because they're paranoid doesn't mean you're not psychotic" - Who, me?? |
#48
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In comp.sys.ibm.pc.hardware.chips Ben Pope wrote:
Indeed. And if you want to know what the real figures are for a particular chip it's easy enough to find out. With Intel we still don't know where the 800MHz figure comes from. It's not an 800MHz clock. If it's 100MHz * 2 channels * 4 transfers per clock then it really isn't 800Million of anything per second, it's 400Million at twice the width - VERY different. The base frequency of the processor bus as found on the Pentium 4 now runs at 200 MHz. The data bus of the processor bus is capable of transferring 4 beats of data per cycle. This is done through the use of 2 source synchronous reference signals that are 90 degrees out of phase with each other. The data on the data bus can be sent (and received) on the rising and falling edge of each of the reference signals. There are 4 edges that can be sampled every cycle, so 4 beats of data per cycle. At 200 million cycles per second, that's a data rate of 800 Mbps per pin. You are getting it mixed up with the data rate on the memory side of things. It's 400 Mbps per pin there, but it's a 128 bit wide data bus for the i875P and i865P series of chipsets. -- davewang202(at)yahoo(dot)com |
#49
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David Wang wrote:
In comp.sys.ibm.pc.hardware.chips Ben Pope wrote: Indeed. And if you want to know what the real figures are for a particular chip it's easy enough to find out. With Intel we still don't know where the 800MHz figure comes from. It's not an 800MHz clock. If it's 100MHz * 2 channels * 4 transfers per clock then it really isn't 800Million of anything per second, it's 400Million at twice the width - VERY different. The base frequency of the processor bus as found on the Pentium 4 now runs at 200 MHz. The data bus of the processor bus is capable of transferring 4 beats of data per cycle. This is done through the use of 2 source synchronous reference signals that are 90 degrees out of phase with each other. The data on the data bus can be sent (and received) on the rising and falling edge of each of the reference signals. There are 4 edges that can be sampled every cycle, so 4 beats of data per cycle. At 200 million cycles per second, that's a data rate of 800 Mbps per pin. You are getting it mixed up with the data rate on the memory side of things. It's 400 Mbps per pin there, but it's a 128 bit wide data bus for the i875P and i865P series of chipsets. Thanks for the explanation(s). At last someone who knows what is actually going on. Ben -- I'm not just a number. To many, I'm known as a String... |
#50
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George Macdonald wrote:
All the 4x data rate buses, AGP included, use double speed clocking and DDR signalling. For The P4's "800MHz" FSB, the base bus clock rate is 200MHz. The address bus is the 200MHz with DDR signalling. The data bus strobe clock is 400MHz differential(IIRC), source synchronous with DDR signalling to get the 800 number. For the 64-bits, there are actually 4 separate 16-bit sub-buses with their own strobe clocks and it uses something called Dynamic Bus Inversion, which means that if less than 8 of the 16 bits are 1, it inverts all 16 signals on the fly. I guess I should thank you too... since you were first :-) Ben -- I'm not just a number. To many, I'm known as a String... |
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