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#11
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Intel cancels next-generation Xeon for even-more-next-generationXeon
David Kanter wrote:
Yeah, that was 3GIO, which became Arapahoe, which became PCI-Express. That was in a futile attempt to derail any momentum building for AMD's Hypertransport. Of course PCI-E is no competition for HT, it's much too bloated to be a chip-to-chip interconnect. AMD never fell for it, and kept HT as simple as possible while Intel threw as much bling-bling into PCI-e to dazzle people with features. How is it bloated, oh font of interconnect wisdom? Perhaps you don't realize it, but serial interconnects are far higher bandwidth... Now it looks like AMD might even use PCI-e against Intel, if the rumours about AMD building a PCI-e link directly into its processors can be believed. I don't see how that is "using PCI-e against Intel"... And not long ago I read somewhere Intel was going to use a dual bus like the one AMD used on the Athlon MP, I can only hope that was false or they have now dumped that too, I doubt it would get them far, still a shared bus right? Yeah, I think that was supposed to be in the Deerfield processor that Intel just cancelled. No it's not cancelled moron. Deerfield is a LV IPF part. They cancelled Whitefield. White, not deer. Intel's next gen server chipset is a wonderful piece of work and features dual independent FSBs. I suspect the next generation after that will feature 4 or more. David Dual FSB on the chipset. Those guys must be geniuses. (ever look at summit?) del -- Del Cecchi "This post is my own and doesn’t necessarily represent IBM’s positions, strategies or opinions.” |
#12
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Intel cancels next-generation Xeon for even-more-next-generation Xeon
How is it bloated, oh font of interconnect wisdom? Perhaps you don't
realize it, but serial interconnects are far higher bandwidth... Now it looks like AMD might even use PCI-e against Intel, if the rumours about AMD building a PCI-e link directly into its processors can be believed. I don't see how that is "using PCI-e against Intel"... And not long ago I read somewhere Intel was going to use a dual bus like the one AMD used on the Athlon MP, I can only hope that was false or they have now dumped that too, I doubt it would get them far, still a shared bus right? Yeah, I think that was supposed to be in the Deerfield processor that Intel just cancelled. No it's not cancelled moron. Deerfield is a LV IPF part. They cancelled Whitefield. White, not deer. Intel's next gen server chipset is a wonderful piece of work and features dual independent FSBs. I suspect the next generation after that will feature 4 or more. Dual FSB on the chipset. Those guys must be geniuses. (ever look at summit?) I most certainly have looked at Summit, although only with passing interest. I truly paid attention to the X3 chipset (BTW, do you sit near Jeff Brown?) http://www.realworldtech.com/page.cf...WT042405213553 As you pointed out, Intel's Blackford chipset is quite similar to IBM's X2 and X3 chipsets. David |
#13
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Intel cancels next-generation Xeon for even-more-next-generation Xeon
David Kanter wrote:
Yeah, that was 3GIO, which became Arapahoe, which became PCI-Express. That was in a futile attempt to derail any momentum building for AMD's Hypertransport. Of course PCI-E is no competition for HT, it's much too bloated to be a chip-to-chip interconnect. AMD never fell for it, and kept HT as simple as possible while Intel threw as much bling-bling into PCI-e to dazzle people with features. How is it bloated, oh font of interconnect wisdom? Perhaps you don't realize it, but serial interconnects are far higher bandwidth... Convince me how you'd use PCIe as a transport mechanism for cache-coherent processor-to-processor traffic. Now it looks like AMD might even use PCI-e against Intel, if the rumours about AMD building a PCI-e link directly into its processors can be believed. I don't see how that is "using PCI-e against Intel"... It ends up being a higher performance connection than anything Intel could do itself. And not long ago I read somewhere Intel was going to use a dual bus like the one AMD used on the Athlon MP, I can only hope that was false or they have now dumped that too, I doubt it would get them far, still a shared bus right? Yeah, I think that was supposed to be in the Deerfield processor that Intel just cancelled. No it's not cancelled moron. Deerfield is a LV IPF part. They cancelled Whitefield. White, not deer. Well, then I guess we'll await cancellation of Deerfield later. :-) Intel's next gen server chipset is a wonderful piece of work and features dual independent FSBs. I suspect the next generation after that will feature 4 or more. Such impressive sophistication. Who would've believed this technology just some years ago? :-) Yousuf Khan |
#14
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Intel cancels next-generation Xeon for even-more-next-generation Xeon
On 27 Oct 2005 20:59:09 -0700, "David Kanter" wrote:
Yeah, that was 3GIO, which became Arapahoe, which became PCI-Express. That was in a futile attempt to derail any momentum building for AMD's Hypertransport. Of course PCI-E is no competition for HT, it's much too bloated to be a chip-to-chip interconnect. AMD never fell for it, and kept HT as simple as possible while Intel threw as much bling-bling into PCI-e to dazzle people with features. How is it bloated, oh font of interconnect wisdom? Perhaps you don't realize it, but serial interconnects are far higher bandwidth... Now it looks like AMD might even use PCI-e against Intel, if the rumours about AMD building a PCI-e link directly into its processors can be believed. I don't see how that is "using PCI-e against Intel"... And not long ago I read somewhere Intel was going to use a dual bus like the one AMD used on the Athlon MP, I can only hope that was false or they have now dumped that too, I doubt it would get them far, still a shared bus right? Yeah, I think that was supposed to be in the Deerfield processor that Intel just cancelled. No it's not cancelled moron. Deerfield is a LV IPF part. They cancelled Whitefield. White, not deer. Intel's next gen server chipset is a wonderful piece of work and features dual independent FSBs. 'Cept they're a trifle late to the party - IBM's already done it. I suspect the next generation after that will feature 4 or more. If you'd been paying attention, it'd be clear that the "next generation" will be no more FSB - it won't exist, it'll be kaput, it'll be an err, ex-FSB. The only reason that Intel is not going to an intergrated memory controller sooner is because of the mess of market segmentation they've attempted to create - IOW the marketing tail has been wagging the technical dog for far too long. In fact *I* suspect that the just cancelled chip was to be the last FSB CPU - IOW the road-map adjustment which brings a later development forward to replace it is the first integrated memory controller CPU. Untangling marketing bungles, rearranging road-maps which are falling apart under competitive pressures, does take some time and umm, energy. -- Rgds, George Macdonald |
#15
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Intel cancels next-generation Xeon for even-more-next-generation Xeon
George Macdonald wrote:
In fact *I* suspect that the just cancelled chip was to be the last FSB CPU - IOW the road-map adjustment which brings a later development forward to replace it is the first integrated memory controller CPU. Untangling marketing bungles, rearranging road-maps which are falling apart under competitive pressures, does take some time and umm, energy. No, far more mundane reasons: office politics. BTW, Whitefield was apparently the name of a suburb in Bangalore, India. Intel's Xeon chip kill is result of chaos in India | The Register http://www.theregister.co.uk/2005/10...tefield_india/ Yousuf Khan |
#16
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Intel Self-Destruct Mode Aids AMD Momentum
keith wrote:
The whole fleet of next years Xeons (now heating up verification labs at select OEMs) use a separate hose for each processor to MCH connection. They're not going to get to 1333mhz fsb speeds with daisy-chains... Ok, but am I the only one who detects Intel trying to defend the indefensable? IBM tried to hold the "upper ground" too, oh, about 15 years ago. ...and had a better position (different ISA). Here's another article about it. It looks like the whole mainstream media is finally waking upto the fact that Intel is not going to simply come back after this one. It's built up a tremendous trailing position of several years distance, which is getting damn near insurmountable. InformationWeek Weblog: Intel Self-Destruct Mode Aids AMD Momentum http://www.informationweek.com/blog/...lfdestr_1.html Yousuf Khan |
#17
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Intel cancels next-generation Xeon for even-more-next-generation Xeon
"David Kanter" wrote in message oups.com... How is it bloated, oh font of interconnect wisdom? Perhaps you don't realize it, but serial interconnects are far higher bandwidth... Now it looks like AMD might even use PCI-e against Intel, if the rumours about AMD building a PCI-e link directly into its processors can be believed. I don't see how that is "using PCI-e against Intel"... And not long ago I read somewhere Intel was going to use a dual bus like the one AMD used on the Athlon MP, I can only hope that was false or they have now dumped that too, I doubt it would get them far, still a shared bus right? Yeah, I think that was supposed to be in the Deerfield processor that Intel just cancelled. No it's not cancelled moron. Deerfield is a LV IPF part. They cancelled Whitefield. White, not deer. Intel's next gen server chipset is a wonderful piece of work and features dual independent FSBs. I suspect the next generation after that will feature 4 or more. Dual FSB on the chipset. Those guys must be geniuses. (ever look at summit?) I most certainly have looked at Summit, although only with passing interest. I truly paid attention to the X3 chipset (BTW, do you sit near Jeff Brown?) yes. one floor down. Although with all the moves in the last couple weeks we may be temporarily on same floor. http://www.realworldtech.com/page.cf...WT042405213553 As you pointed out, Intel's Blackford chipset is quite similar to IBM's X2 and X3 chipsets. David Only ours is better. :-) |
#18
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Intel cancels next-generation Xeon for even-more-next-generation Xeon
Del Cecchi wrote: "David Kanter" wrote in message oups.com... How is it bloated, oh font of interconnect wisdom? Perhaps you don't realize it, but serial interconnects are far higher bandwidth... Now it looks like AMD might even use PCI-e against Intel, if the rumours about AMD building a PCI-e link directly into its processors can be believed. I don't see how that is "using PCI-e against Intel"... And not long ago I read somewhere Intel was going to use a dual bus like the one AMD used on the Athlon MP, I can only hope that was false or they have now dumped that too, I doubt it would get them far, still a shared bus right? Yeah, I think that was supposed to be in the Deerfield processor that Intel just cancelled. No it's not cancelled moron. Deerfield is a LV IPF part. They cancelled Whitefield. White, not deer. Intel's next gen server chipset is a wonderful piece of work and features dual independent FSBs. I suspect the next generation after that will feature 4 or more. Dual FSB on the chipset. Those guys must be geniuses. (ever look at summit?) I most certainly have looked at Summit, although only with passing interest. I truly paid attention to the X3 chipset (BTW, do you sit near Jeff Brown?) yes. one floor down. Although with all the moves in the last couple weeks we may be temporarily on same floor. http://www.realworldtech.com/page.cf...WT042405213553 As you pointed out, Intel's Blackford chipset is quite similar to IBM's X2 and X3 chipsets. David Only ours is better. :-) I'll tell you what, if you can convince the PMs and PR folks involved, have them send me a rather large, fully loaded box and I can prove it (or disprove it). DK |
#19
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Intel Self-Destruct Mode Aids AMD Momentum
On 28 Oct 2005 13:52:39 -0700, "YKhan" wrote:
keith wrote: The whole fleet of next years Xeons (now heating up verification labs at select OEMs) use a separate hose for each processor to MCH connection. They're not going to get to 1333mhz fsb speeds with daisy-chains... Ok, but am I the only one who detects Intel trying to defend the indefensable? IBM tried to hold the "upper ground" too, oh, about 15 years ago. ...and had a better position (different ISA). Here's another article about it. It looks like the whole mainstream media is finally waking upto the fact that Intel is not going to simply come back after this one. It's built up a tremendous trailing position of several years distance, which is getting damn near insurmountable. InformationWeek Weblog: Intel Self-Destruct Mode Aids AMD Momentum http://www.informationweek.com/blog/...lfdestr_1.html Yousuf Khan If only the ones sitting in corner offices and making procurement decisions read InformationWeek or any other "mainstream media"... But if they commute by car they almost certainly listen to that jingle on the radio while driving. And when they watch TV they certainly watch the blue men (BTW, in Russian "blue men" is just another expression for "fags") - these executive folks rearly have sufficient programming skills to program even TiVo so they are likely not skipping the ads. AMD may be leaps and bounds ahead of Intel in terms of technology, but I don't see them surpassing Intel marketing dept. any time soon. Besides, "nobody ever has been fired for buying Intel" still holds true. NNN |
#20
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Intel cancels next-generation Xeon for even-more-next-generation Xeon
On 28 Oct 2005 13:40:14 -0700, "YKhan" wrote:
George Macdonald wrote: In fact *I* suspect that the just cancelled chip was to be the last FSB CPU - IOW the road-map adjustment which brings a later development forward to replace it is the first integrated memory controller CPU. Untangling marketing bungles, rearranging road-maps which are falling apart under competitive pressures, does take some time and umm, energy. No, far more mundane reasons: office politics. BTW, Whitefield was apparently the name of a suburb in Bangalore, India. Intel's Xeon chip kill is result of chaos in India | The Register http://www.theregister.co.uk/2005/10...tefield_india/ Yousuf Khan Just another case of offshoring backfiring. The only advantage of these Indians over Americans is the price - Indians are dirt-cheap, you just can't compete against the guy that is paid less than minimum wage and asks for no medical coverage. But in the end, you get what you paid for. If I feel sorry for anyone, that are the guys in US and Israel who lost their Intel jobs to the Indians. Hopefully the insanity will eventually stop, and the tide of offshoring will turn. NNN |
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