If this is your first visit, be sure to check out the FAQ by clicking the link above. You may have to register before you can post: click the register link above to proceed. To start viewing messages, select the forum that you want to visit from the selection below. |
|
|
Thread Tools | Display Modes |
#1
|
|||
|
|||
1GB page tables and 48-bit physical addressing!
AMD readies hounds to blood Intel's next gen hares
"The HPC crowd will also love the memory controller enhancements. Think 1GB page tables and 48-bit physical addressing for a total of 256TB of RAM. Can you say Cray and SGI doing the happy dance? This part should have a happy home in large servers." http://www.theinquirer.net/?article=30042 Also doubling the floating point units as was mentioned previously. It appears to be twice the number or 64-bit fpus, rather than an increase from a 64-bit to a 128-bit fpu. Yousuf Khan |
#2
|
|||
|
|||
1GB page tables and 48-bit physical addressing!
On 3 Mar 2006 08:20:14 -0800, "YKhan" wrote:
AMD readies hounds to blood Intel's next gen hares "The HPC crowd will also love the memory controller enhancements. Think 1GB page tables and 48-bit physical addressing for a total of 256TB of RAM. Can you say Cray and SGI doing the happy dance? This part should have a happy home in large servers." http://www.theinquirer.net/?article=30042 I suppose this is a good idea going forward, but I'm not sure that either Cray or SGI are doing too many happy dances. The maximum memory controllers AMD chips can address natively is 8. Each chip can hold up to 8 DIMMs. Currently they max out at 4GB per DIMM. So the grand total of physical memory they can address is 256GB... and I've never seen anyone build such a configuration (128GB is the most I've seen). Beyond 8 CPUs, ie what the HPC community is going to use, they have to go beyond what can be natively addressed by the processor. Then we're dealing with the virtual memory addressing, where it's already at 48-bits/256TB. Also doubling the floating point units as was mentioned previously. It appears to be twice the number or 64-bit fpus, rather than an increase from a 64-bit to a 128-bit fpu. More to the point, we're probably talking about doubling SSE units here. ------------- Tony Hill hilla underscore 20 at yahoo dot ca |
#3
|
|||
|
|||
1GB page tables and 48-bit physical addressing!
Tony Hill wrote:
Beyond 8 CPUs, ie what the HPC community is going to use, they have to go beyond what can be natively addressed by the processor. Then we're dealing with the virtual memory addressing, where it's already at 48-bits/256TB. Well, obviously the virtual memory limits will go up too. The current 48-bit virtual limit is based on 1MB pages. With a 1GB page, we're probably talking about a 56-bit virtual limit now. Yousuf Khan -- There is no failure, only delayed success |
#4
|
|||
|
|||
1GB page tables and 48-bit physical addressing!
On 3 Mar 2006 08:20:14 -0800, "YKhan" wrote:
AMD readies hounds to blood Intel's next gen hares "The HPC crowd will also love the memory controller enhancements. Think 1GB page tables and 48-bit physical addressing for a total of 256TB of RAM. Can you say Cray and SGI doing the happy dance? This part should have a happy home in large servers." http://www.theinquirer.net/?article=30042 Also doubling the floating point units as was mentioned previously. It appears to be twice the number or 64-bit fpus, rather than an increase from a 64-bit to a 128-bit fpu. Yousuf Khan Deerhound... Wolfhound... Whatever other hounds - all names dog-related or, scientifically speaking, canine. Could that be a hint to K-9? ;-) NNN |
#5
|
|||
|
|||
1GB page tables and 48-bit physical addressing!
Quote:
the K-9 processor since their first K-5 processor. :-) Yousuf Khan |
#6
|
|||
|
|||
1GB page tables and 48-bit physical addressing!
On 6 Mar 2006 08:16:00 -0800, "YKhan" wrote:
Quote:
I think AMD has been dreading the day that they would need to create the K-9 processor since their first K-5 processor. :-) Yousuf Khan Why? It would only underscore the jorney AMD made from being a perrenial _underdog_ to becoming the _top dog_ (at least, performance-wise). NNN |
#7
|
|||
|
|||
1GB page tables and 48-bit physical addressing!
"YKhan" wrote in message oups.com... Quote:
I think AMD has been dreading the day that they would need to create the K-9 processor since their first K-5 processor. :-) Yousuf Khan Does that mean they know the K9 will be a dog of a processor? |
Thread Tools | |
Display Modes | |
|
|
Similar Threads | ||||
Thread | Thread Starter | Forum | Replies | Last Post |
Hyperthreaded vs 2 processors | OneSolution | Intel | 22 | December 1st 04 03:57 AM |
I know about wiping the disk, but what about the MBR and Partition tables ? | nh2 | Storage (alternative) | 5 | July 11th 04 10:46 PM |
Why was Intel a no-show on No Execute? | glen herrmannsfeldt | General | 137 | June 9th 04 08:14 AM |
Why was Intel a no-show on No Execute? | Yousuf Khan | Intel | 139 | June 9th 04 08:14 AM |
Monitor Calibration and Gamma Corrected Lookup Tables | Howard | Ati Videocards | 1 | October 10th 03 07:13 PM |