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#1
November 19th 08, 10:44 PM
posted to comp.sys.intel
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Memory Access Regarding Rank/Bank Combinations
Hi, Group,
Sorry for the confusing title. My question is based on the following truth (might not true..): Each physical memory address maps to a specific rank/bank pair. The bandwidth to each rank/bank pair is limited. Memory access hits multiple rank/bank pairs in parallel achieve better memory throughput. Are there any codes can demonstrate this effect? 
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#2
November 20th 08, 01:41 AM
posted to comp.sys.intel
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Memory Access Regarding Rank/Bank Combinations
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