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#1
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Why not in chip memory controller?
Does any one have insights on this issue? AMD's memory controller
showed obvious advantages over Intel's FSB so far. Why can't Intel just copy that? Once I saw somebody from Intel saying that have the controller on board instead of in chip benefits some other stuff of a computer, such as integrated graphics. Do you really think that's the reason they refuse to put the controller in their chip? |
#2
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Why not in chip memory controller?
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#4
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Why not in chip memory controller?
* Carlo Razzeto:
Why intel doesn't use integrated memory controllers, well you have to ask them, they probably have their reasons. But fact is that integrated memory controllers (which lead to a NUMA config) not only have advantages but also disadvantages in SMP configurations (NUMA effect). In short and easy words, accessing the memory which is connected directly to the cpu is fast while accessing the memory connected to other cpus is slow. UMA memory systems on the other side have a somewhat constant memory performance. Benjamin Actually, NUMA has some seriouse advanatages in SMP. Please check out http://www.anandtech.com/IT/showdoc.aspx?i=2745 This is no article about UMA vs NUMA but between XEON vs. Opteron. But then Andandtech like all the other self-proclaimed hardware experts doesn't have any experience with anything else than PCs. However, NUMA can have a huge performance penalty in several applications, it's definitely not always better than UMA... Benjamin |
#5
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Why not in chip memory controller?
Carlo Razzeto wrote:
Actually, NUMA has some seriouse advanatages in SMP. Are there any advantages to NUMA per se, as opposed to just much higher total bandwidth? My impression is that the big advantage of NUMA is that in practice it will often allow much higher total bandwidths ( 2x on Opteron vs. Nocona). But in theory, if you can have the same total bandwidth and bandwidth per processor with fully uniform memory access, that should have the highest performance. (In practice, this gets really, really expensive.) -- Nate Edel http://www.cubiclehermit.com/ "What's the use of yearning for Elysian Fields when you know you can't get 'em, and would only let 'em out on building leases if you had 'em?" (WSG) |
#6
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Why not in chip memory controller?
"Nate Edel" wrote in message
... Carlo Razzeto wrote: Actually, NUMA has some seriouse advanatages in SMP. Are there any advantages to NUMA per se, as opposed to just much higher total bandwidth? My impression is that the big advantage of NUMA is that in practice it will often allow much higher total bandwidths ( 2x on Opteron vs. Nocona). But in theory, if you can have the same total bandwidth and bandwidth per processor with fully uniform memory access, that should have the highest performance. (In practice, this gets really, really expensive.) -- Nate Edel http://www.cubiclehermit.com/ "What's the use of yearning for Elysian Fields when you know you can't get 'em, and would only let 'em out on building leases if you had 'em?" (WSG) Well, I guess there are a couple a problems with that... First like you said is cost... Technically Intel could make a system with as much bandwidth available to each CPU as an 8 way opteron gets, the problem is the same configuration in say, 16 would be offering each CPU half of what a similar 16 way opteron would. So in the end, the real problem with UMA v. NUMA is scaling. Currently Intel's position on the IMC issue is "we don't need it, more cache will do the same thing". I guess for uniprocessor, DC and small scale multi-socket systems they have a point, they just end up losing in higher end configurations. As the benchmark I linked to demonstrates currently it only takes a 4 socket (8 core) configuration for intel to start feeling some serious hurt with their UMA arch. I guess it should be noted that what Ben pointed out is technically an issue. In some cases, particularly if your OS is not NUMA aware you can end up with slightly higher latencies when a process requires data stored in memory controlled by another CPU. However, first off most OSs *are* indeed NUMA aware, so this is minimized. Also, at least in AMD's case this type of situation doesn't lead to the kind of high latencies and stalls you might think, the system is fairly well optimized. I would venture a guess that most people developing a NUMA system would consider this and optimize as best they can for it. Carlo |
#7
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Why not in chip memory controller?
"Benjamin Gawert" wrote in message
... * Carlo Razzeto: Actually, NUMA has some seriouse advanatages in SMP. Please check out http://www.anandtech.com/IT/showdoc.aspx?i=2745 This is no article about UMA vs NUMA but between XEON vs. Opteron. But then Andandtech like all the other self-proclaimed hardware experts doesn't have any experience with anything else than PCs. However, NUMA can have a huge performance penalty in several applications, it's definitely not always better than UMA... Benjamin Technically yes, but these are really the only NUMA v. UMA benchmarks that are readily available. They do however demonstrate how UMA systems tend to become more quickly and easily memory starved than NUMA systems. Carlo |
#8
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Why not in chip memory controller?
Carlo Razzeto wrote:
"Benjamin Gawert" wrote in message ... * Carlo Razzeto: Actually, NUMA has some seriouse advanatages in SMP. Please check out http://www.anandtech.com/IT/showdoc.aspx?i=2745 This is no article about UMA vs NUMA but between XEON vs. Opteron. But then Andandtech like all the other self-proclaimed hardware experts doesn't have any experience with anything else than PCs. However, NUMA can have a huge performance penalty in several applications, it's definitely not always better than UMA... Benjamin Technically yes, but these are really the only NUMA v. UMA benchmarks that are readily available. They do however demonstrate how UMA systems tend to become more quickly and easily memory starved than NUMA systems. I think it's fair to say that NUMA scales well, I believe that UMA will be faster for two core and about the same for four. The real advantage of the Intel controller is that you can customize it for the environment, memory type, etc. And it allows other vendors to offer custom chips as well, such as the IBM cache snooping chipset. With AMD you have your choice of the controller on the chip. Period. In actual practice I don't think it's a huge difference until scaling effects become significant. For most systems that's not an issue. -- bill davidsen SBC/Prodigy Yorktown Heights NY data center http://newsgroups.news.prodigy.com |
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