ISA does not matter

In article
,
Robert Myers wrote:

On Aug 17, 1:52*pm, Yousuf Khan wrote:


In most modern implementations of x86, certain common instructions are
considered hard-coded, while others are emulated through microcode. Most
floating point instructions are a series of more basic instructions.


I'll take the word of real computer architects on this one, Yousuf.
Past the decode stage, the ISA doesn't matter. Programmers and others
like to talk about ISA's because that's all they understand. ISA is
irrelevant now. Whatever obstacles there are to "emulating" x86 have
nothing to do with the ISA.

Robert.

You are wrong.

I give you the example of Apple's AltiVec instruction set.
AltiVec at introduction gave the PowerPC chips a 10x speed advantage
on a bunch of important graphical benchmarks, and makes the vector
processor useful in a wide variety of other tasks that are not
normally thought of as vector code. (Filesystem block allocation, etc.)

Ultimately this one innovation alone was not enough for PowerPC to
overcome all the disadvantages of competing against Intel, but it
did level the playing field for a decade.

AltiVec came from a software firm, those "real computer architects"
idea of innovation was Thumb1 and MIPS16, bunch of (CENSORED).

Brett

On Aug 22, 1:51*am, Brett Davis wrote:
In article
,
*Robert Myers wrote:

On Aug 17, 1:52*pm, Yousuf Khan wrote:

In most modern implementations of x86, certain common instructions are
considered hard-coded, while others are emulated through microcode. Most
floating point instructions are a series of more basic instructions.

I'll take the word of real computer architects on this one, Yousuf.
Past the decode stage, the ISA doesn't matter. *Programmers and others
like to talk about ISA's because that's all they understand. *ISA is
irrelevant now. *Whatever obstacles there are to "emulating" x86 have
nothing to do with the ISA.

Robert.

You are wrong.

I give you the example of Apple's AltiVec instruction set.
AltiVec at introduction gave the PowerPC chips a 10x speed advantage
on a bunch of important graphical benchmarks, and makes the vector
processor useful in a wide variety of other tasks that are not
normally thought of as vector code. (Filesystem block allocation, etc.)

Ultimately this one innovation alone was not enough for PowerPC to
overcome all the disadvantages of competing against Intel, but it
did level the playing field for a decade.

AltiVec came from a software firm, those "real computer architects"
idea of innovation was Thumb1 and MIPS16, bunch of (CENSORED).


Sure.

I can bolt a GPU onto the CPU, declare its instructions and features
to be part of the ISA, and claim that ISA, in the sense that people
usually mean it, can make a huge difference. That makes ia32 with
MMX, SSE, etc. a different ISA from the 386. You can change the way
that ISA is used to make your statement true and mine false, but I
decline all arguments about terminology. I know what I meant, even if
you didn't.

You can bolt a specialized capability onto anything, so the ISA, in
the sense that people usually mean it, *doesn't* make a difference, at
least not from the evidence you have presented.

Robert.

In article ,
Brett Davis wrote:

I give you the example of Apple's AltiVec instruction set.
AltiVec at introduction gave the PowerPC chips a 10x speed advantage
on a bunch of important graphical benchmarks, and makes the vector
processor useful in a wide variety of other tasks that are not
normally thought of as vector code. (Filesystem block allocation, etc.)

Marginally. The differences were not exciting, outside benchmarketing
and a few specialised uses.

Ultimately this one innovation alone was not enough for PowerPC to
overcome all the disadvantages of competing against Intel, but it
did level the playing field for a decade.

Not really. Witness how many other companies showed an interest;
it wasn't even up to the level of SPARC or MIPS, though I accept
that there were other reasons than performance that dominated.


Regards,
Nick Maclaren.

Brett Davis wrote:
Robert wrote:
I'll take the word of real computer architects on this one, Yousuf.
Past the decode stage, the ISA doesn't matter. Programmers and others
like to talk about ISA's because that's all they understand. ISA is
irrelevant now. Whatever obstacles there are to "emulating" x86 have
nothing to do with the ISA.

Robert.

You are wrong.

I give you the example of Apple's AltiVec instruction set.

AltiVec is a pretty nice, clean SIMD instruction set.

AltiVec at introduction gave the PowerPC chips a 10x speed advantage
on a bunch of important graphical benchmarks, and makes the vector

10x is bogus: This was only when comparing generic C on cpu A with
handcoded AltiVec asm.

processor useful in a wide variety of other tasks that are not
normally thought of as vector code. (Filesystem block allocation, etc.)

Ultimately this one innovation alone was not enough for PowerPC to
overcome all the disadvantages of competing against Intel, but it
did level the playing field for a decade.

Nothing like a decade: After SSE2 there's only been a very small delta
in throughput per cycle, mostly due to the very power-hungry but
extremely useful permute engine.

AltiVec came from a software firm, those "real computer architects"
idea of innovation was Thumb1 and MIPS16, bunch of (CENSORED).

Terje
--
- Terje.Mathisen at tmsw.no
"almost all programming can be viewed as an exercise in caching"

On Aug 22, 12:56*pm, Terje Mathisen "terje.mathisen at tmsw.no"
wrote:
Brett Davis wrote:
* Robert *wrote:
I'll take the word of real computer architects on this one, Yousuf.
Past the decode stage, the ISA doesn't matter. *Programmers and others
like to talk about ISA's because that's all they understand. *ISA is
irrelevant now. *Whatever obstacles there are to "emulating" x86 have
nothing to do with the ISA.

Robert.

You are wrong.

I give you the example of Apple's AltiVec instruction set.

AltiVec is a pretty nice, clean [single precision] SIMD instruction set.


Robert.

On Aug 22, 12:51*am, Brett Davis wrote:
In article
,
*Robert Myers wrote:

On Aug 17, 1:52*pm, Yousuf Khan wrote:

In most modern implementations of x86, certain common instructions are
considered hard-coded, while others are emulated through microcode. Most
floating point instructions are a series of more basic instructions.

I'll take the word of real computer architects on this one, Yousuf.
Past the decode stage, the ISA doesn't matter. *Programmers and others
like to talk about ISA's because that's all they understand. *ISA is
irrelevant now. *Whatever obstacles there are to "emulating" x86 have
nothing to do with the ISA.

Robert.

You are wrong.

No, Robert is correct. After the decode stage the ISA is irrelevent
{caveat: the rest of the pipeline was not horribly screwed up.}

But I will go one step further. In the light of th modern 16-19 stage
x86 pipelines with OoO execution, reservation stations, hit under miss
caches, reorder buffers, exotic branch prediction, store to laod
forwarding,... The cost of x86 (with all of its atrocities) versus a
perfectly designed RISC ISA is on the order of 2% in architectural
figure of merit, and maybe one gate delay of pipeline cycle time.
Certainly less than 7% overall.

I give you the example of Apple's AltiVec instruction set.

An advantage so great it has been revoved from the (re)merger of Power
and Power-PC.

Mitch

In article , wrote:

In article ,
Brett Davis wrote:

I give you the example of Apple's AltiVec instruction set.
AltiVec at introduction gave the PowerPC chips a 10x speed advantage
on a bunch of important graphical benchmarks, and makes the vector
processor useful in a wide variety of other tasks that are not
normally thought of as vector code. (Filesystem block allocation, etc.)

Marginally. The differences were not exciting, outside benchmarketing
and a few specialised uses.

If the actual work involved was small, you would quickly become limited
by the front bus speed. Capping the performance increase at 2x.
Programmers routinely got far more than 2x.

In this day and age where the next OoO breakthrough will get you 0.1%
speed increase, an easy 100% to 200% is gigantic.

Yes you had to write some inline assembly, so generic cross platform
benchmarks were not helped. Apple did not have its own compiler at
the time, and would not have cared to rig the benchmarks like Intel
does. (If Spec $10 million in inline assembly, else gcc.)

Ultimately this one innovation alone was not enough for PowerPC to
overcome all the disadvantages of competing against Intel, but it
did level the playing field for a decade.

Not really. Witness how many other companies showed an interest;
it wasn't even up to the level of SPARC or MIPS, though I accept
that there were other reasons than performance that dominated.

I call "bull****" on you.
SPARC and MIPS do not have the spare opcode space to implement the
AltiVec permute instructions, and then there is the little issue of
Apple owning the patents.

http://en.wikipedia.org/wiki/Altivec

Brett

On 22 Aug 2010 23:02:44 +0100 (BST), Paul Gotch
wrote:

In comp.arch MitchAlsup wrote:
An advantage so great it has been revoved from the (re)merger of Power
and Power-PC.

The "merger" was mostly marketeering. Power processors, since the Power2, I
think, used the PowerPC architecture.

VMX (IBM call it something different as FreeScale own the AltiVec
trademark) is part of the Power ISA v2.03 and is implemented in POWER
6 and beyond, although before this IBM consistently left it out.

VMX was in the '970 (Apple's G5), which was based on the Power-4.

"Brett Davis" wrote in message
...
In article
,
Robert Myers wrote:

On Aug 17, 1:52 pm, Yousuf Khan wrote:


In most modern implementations of x86, certain common instructions are
considered hard-coded, while others are emulated through microcode. Most
floating point instructions are a series of more basic instructions.


I'll take the word of real computer architects on this one, Yousuf.
Past the decode stage, the ISA doesn't matter. Programmers and others
like to talk about ISA's because that's all they understand. ISA is
irrelevant now. Whatever obstacles there are to "emulating" x86 have
nothing to do with the ISA.

Robert.

You are wrong.

I give you the example of Apple's AltiVec instruction set.
AltiVec at introduction gave the PowerPC chips a 10x speed advantage
on a bunch of important graphical benchmarks, and makes the vector
processor useful in a wide variety of other tasks that are not
normally thought of as vector code. (Filesystem block allocation, etc.)

Ultimately this one innovation alone was not enough for PowerPC to
overcome all the disadvantages of competing against Intel, but it
did level the playing field for a decade.

AltiVec came from a software firm, those "real computer architects"
idea of innovation was Thumb1 and MIPS16, bunch of (CENSORED).

Brett


Not sure if relevant in this discussion but the ISA makes a huge difference to
the code density (discussed in comp.arch.embedded)

See http://www.csl.cornell.edu/~vince/pa...d09/iccd09.pdf

Hans
www.ht-lab.com

In article ,
Brett Davis wrote:

Ultimately this one innovation alone was not enough for PowerPC to
overcome all the disadvantages of competing against Intel, but it
did level the playing field for a decade.

Not really. Witness how many other companies showed an interest;
it wasn't even up to the level of SPARC or MIPS, though I accept
that there were other reasons than performance that dominated.

I call "bull****" on you.
SPARC and MIPS do not have the spare opcode space to implement the
AltiVec permute instructions, and then there is the little issue of
Apple owning the patents.

I was referring to the number of other companies that were interested
in licensing PowerPC, let alone PowerPC+Altivec. Far more pursued
SPARC and MIPS.


Regards,
Nick Maclaren.