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ISA does not matter



 
 
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  #1  
Old August 22nd 10, 06:51 AM posted to comp.sys.ibm.pc.hardware.chips,comp.sys.intel,comp.arch
Brett Davis
external usenet poster
 
Posts: 22
Default ISA does not matter

In article
,
Robert Myers wrote:

On Aug 17, 1:52*pm, Yousuf Khan wrote:


In most modern implementations of x86, certain common instructions are
considered hard-coded, while others are emulated through microcode. Most
floating point instructions are a series of more basic instructions.


I'll take the word of real computer architects on this one, Yousuf.
Past the decode stage, the ISA doesn't matter. Programmers and others
like to talk about ISA's because that's all they understand. ISA is
irrelevant now. Whatever obstacles there are to "emulating" x86 have
nothing to do with the ISA.

Robert.


You are wrong.

I give you the example of Apple's AltiVec instruction set.
AltiVec at introduction gave the PowerPC chips a 10x speed advantage
on a bunch of important graphical benchmarks, and makes the vector
processor useful in a wide variety of other tasks that are not
normally thought of as vector code. (Filesystem block allocation, etc.)

Ultimately this one innovation alone was not enough for PowerPC to
overcome all the disadvantages of competing against Intel, but it
did level the playing field for a decade.

AltiVec came from a software firm, those "real computer architects"
idea of innovation was Thumb1 and MIPS16, bunch of (CENSORED).

Brett
  #2  
Old August 22nd 10, 04:05 PM posted to comp.sys.ibm.pc.hardware.chips,comp.sys.intel,comp.arch
Robert Myers
external usenet poster
 
Posts: 606
Default ISA does not matter

On Aug 22, 1:51*am, Brett Davis wrote:
In article
,
*Robert Myers wrote:

On Aug 17, 1:52*pm, Yousuf Khan wrote:


In most modern implementations of x86, certain common instructions are
considered hard-coded, while others are emulated through microcode. Most
floating point instructions are a series of more basic instructions.


I'll take the word of real computer architects on this one, Yousuf.
Past the decode stage, the ISA doesn't matter. *Programmers and others
like to talk about ISA's because that's all they understand. *ISA is
irrelevant now. *Whatever obstacles there are to "emulating" x86 have
nothing to do with the ISA.


Robert.


You are wrong.

I give you the example of Apple's AltiVec instruction set.
AltiVec at introduction gave the PowerPC chips a 10x speed advantage
on a bunch of important graphical benchmarks, and makes the vector
processor useful in a wide variety of other tasks that are not
normally thought of as vector code. (Filesystem block allocation, etc.)

Ultimately this one innovation alone was not enough for PowerPC to
overcome all the disadvantages of competing against Intel, but it
did level the playing field for a decade.

AltiVec came from a software firm, those "real computer architects"
idea of innovation was Thumb1 and MIPS16, bunch of (CENSORED).


Sure.

I can bolt a GPU onto the CPU, declare its instructions and features
to be part of the ISA, and claim that ISA, in the sense that people
usually mean it, can make a huge difference. That makes ia32 with
MMX, SSE, etc. a different ISA from the 386. You can change the way
that ISA is used to make your statement true and mine false, but I
decline all arguments about terminology. I know what I meant, even if
you didn't.

You can bolt a specialized capability onto anything, so the ISA, in
the sense that people usually mean it, *doesn't* make a difference, at
least not from the evidence you have presented.

Robert.
  #3  
Old August 22nd 10, 04:56 PM posted to comp.sys.ibm.pc.hardware.chips,comp.sys.intel,comp.arch
[email protected]
external usenet poster
 
Posts: 17
Default ISA does not matter

In article ,
Brett Davis wrote:

I give you the example of Apple's AltiVec instruction set.
AltiVec at introduction gave the PowerPC chips a 10x speed advantage
on a bunch of important graphical benchmarks, and makes the vector
processor useful in a wide variety of other tasks that are not
normally thought of as vector code. (Filesystem block allocation, etc.)


Marginally. The differences were not exciting, outside benchmarketing
and a few specialised uses.

Ultimately this one innovation alone was not enough for PowerPC to
overcome all the disadvantages of competing against Intel, but it
did level the playing field for a decade.


Not really. Witness how many other companies showed an interest;
it wasn't even up to the level of SPARC or MIPS, though I accept
that there were other reasons than performance that dominated.


Regards,
Nick Maclaren.
  #4  
Old August 23rd 10, 12:54 AM posted to comp.sys.ibm.pc.hardware.chips,comp.sys.intel,comp.arch
Brett Davis
external usenet poster
 
Posts: 22
Default ISA does not matter

In article , wrote:

In article ,
Brett Davis wrote:

I give you the example of Apple's AltiVec instruction set.
AltiVec at introduction gave the PowerPC chips a 10x speed advantage
on a bunch of important graphical benchmarks, and makes the vector
processor useful in a wide variety of other tasks that are not
normally thought of as vector code. (Filesystem block allocation, etc.)


Marginally. The differences were not exciting, outside benchmarketing
and a few specialised uses.


If the actual work involved was small, you would quickly become limited
by the front bus speed. Capping the performance increase at 2x.
Programmers routinely got far more than 2x.

In this day and age where the next OoO breakthrough will get you 0.1%
speed increase, an easy 100% to 200% is gigantic.

Yes you had to write some inline assembly, so generic cross platform
benchmarks were not helped. Apple did not have its own compiler at
the time, and would not have cared to rig the benchmarks like Intel
does. (If Spec $10 million in inline assembly, else gcc.)

Ultimately this one innovation alone was not enough for PowerPC to
overcome all the disadvantages of competing against Intel, but it
did level the playing field for a decade.


Not really. Witness how many other companies showed an interest;
it wasn't even up to the level of SPARC or MIPS, though I accept
that there were other reasons than performance that dominated.


I call "bull****" on you.
SPARC and MIPS do not have the spare opcode space to implement the
AltiVec permute instructions, and then there is the little issue of
Apple owning the patents.

http://en.wikipedia.org/wiki/Altivec

Brett
  #5  
Old August 23rd 10, 08:46 AM posted to comp.sys.ibm.pc.hardware.chips,comp.sys.intel,comp.arch
[email protected]
external usenet poster
 
Posts: 17
Default ISA does not matter

In article ,
Brett Davis wrote:

Ultimately this one innovation alone was not enough for PowerPC to
overcome all the disadvantages of competing against Intel, but it
did level the playing field for a decade.


Not really. Witness how many other companies showed an interest;
it wasn't even up to the level of SPARC or MIPS, though I accept
that there were other reasons than performance that dominated.


I call "bull****" on you.
SPARC and MIPS do not have the spare opcode space to implement the
AltiVec permute instructions, and then there is the little issue of
Apple owning the patents.


I was referring to the number of other companies that were interested
in licensing PowerPC, let alone PowerPC+Altivec. Far more pursued
SPARC and MIPS.


Regards,
Nick Maclaren.
  #6  
Old August 24th 10, 06:32 AM posted to comp.sys.ibm.pc.hardware.chips,comp.sys.intel,comp.arch
Brett Davis
external usenet poster
 
Posts: 22
Default ISA does not matter

In article , wrote:

In article ,
Brett Davis wrote:

Ultimately this one innovation alone was not enough for PowerPC to
overcome all the disadvantages of competing against Intel, but it
did level the playing field for a decade.

Not really. Witness how many other companies showed an interest;
it wasn't even up to the level of SPARC or MIPS, though I accept
that there were other reasons than performance that dominated.


I call "bull****" on you.
SPARC and MIPS do not have the spare opcode space to implement the
AltiVec permute instructions, and then there is the little issue of
Apple owning the patents.


I was referring to the number of other companies that were interested
in licensing PowerPC, let alone PowerPC+Altivec. Far more pursued
SPARC and MIPS.


The car you drive probably has close to a dozen PowerPC chips in it.
MOT is a $20 billion a year electronics company, and most of those
chips have PowerPC hidden in them.
IBM sells the PowerPC chips in your Tivo/DVR and all three consoles.
(Playstation3, XBox360, and Wii.)

ARMH is a far distant second in sales at ~$600 million a year.
(Pre-iPhone I remember them being a ~$200 million a year company...)

MIPS has yearly sales of $70 million. Used to be twice that?
(Hard to fund a design teem and stay relevant/solvent at that size...)

SPARC as snot for sales outside of SUN/JAVA and Fujitsu.

AltiVec has clearly mattered in making PowerPC the dominate RISC chip.
MIPS used to be significant, the Playstation1 and 2 were MIPS based.

PowerPC has ~90% market share in the 32bit market, and ~99% of the
64bit embedded market. (Dollar share, not unit share.)
Up from zero a decade ago.

If PowerPC was just another RISC chip this could not have happened.
Being late to the market with a me-too product would not have worked.
PowerPC dominates because of AltiVec and the bitfield extract and
other cool useful instructions that give good performance and good
inner loop code density.

Programmers LIKE PowerPC, whereas MIPS and ARM are tolerated.
(This is a major reason PowerPC dominates, pity the fool manager
that picks MIPS and cant find good programmers to work for him.)

ISA does matter, just not the way you think it does.

Brett - Actually working on ARM code right now.
  #7  
Old August 24th 10, 06:50 AM posted to comp.sys.ibm.pc.hardware.chips,comp.sys.intel,comp.arch
Kim Enkovaara
external usenet poster
 
Posts: 26
Default ISA does not matter

On 24.8.2010 8:32, Brett Davis wrote:
The car you drive probably has close to a dozen PowerPC chips in it.
MOT is a $20 billion a year electronics company, and most of those
chips have PowerPC hidden in them.


The semiconductor business of MOT was transferred to Freescale
Semiconductor in 2004, which is a 3.5B company.

PowerPC dominates because of AltiVec and the bitfield extract and
other cool useful instructions that give good performance and good
inner loop code density.


I would say PowerPC is big in the embedded market due to the
good spectrum of different chips that have rich set of peripherials.
The processor itself is not that critical, all the support logic around
is (memory controllers,i2c, ethernet, accelerators, flash, usb etc.).
This is where Intel for example has problems with their Atom.

--Kim
  #8  
Old August 24th 10, 07:58 AM posted to comp.sys.ibm.pc.hardware.chips,comp.sys.intel,comp.arch
Robert Myers
external usenet poster
 
Posts: 606
Default ISA does not matter

On Aug 24, 1:32*am, Brett Davis wrote:


Programmers LIKE PowerPC, whereas MIPS and ARM are tolerated.
(This is a major reason PowerPC dominates, pity the fool manager
that picks MIPS and cant find good programmers to work for him.)


Always good to have insightful advice about programming from a
programmer in a hardware forum.

The original context, which you destroyed by your cross-post, has been
completely lost.

Have you heard of comp.arch.embedded?

Robert.

  #9  
Old August 25th 10, 01:01 AM posted to comp.sys.ibm.pc.hardware.chips,comp.sys.intel,comp.arch
Owen Shepherd
external usenet poster
 
Posts: 2
Default ISA does not matter

Brett Davis wrote:

If PowerPC was just another RISC chip this could not have happened.
Being late to the market with a me-too product would not have worked.
PowerPC dominates because of AltiVec and the bitfield extract and
other cool useful instructions that give good performance and good
inner loop code density.

Programmers LIKE PowerPC, whereas MIPS and ARM are tolerated.
(This is a major reason PowerPC dominates, pity the fool manager
that picks MIPS and cant find good programmers to work for him.)

ISA does matter, just not the way you think it does.

Brett - Actually working on ARM code right now.


My general observation of talking to PowerPC developers has been:
1. IBM couldn't have made a more impenetrable assembly language. Seriously
guys, never heard of register prefixes? Apple's variation was so much
nicer.

2. Why are the bits numbered back to front? Way to confuse the hell out of
people.

On the other hand, ARM development has been a rather pleasant experience; to
each his own

- Owen

(Not to say that any ISA is perfect; god knows ARM has its foibles, just
like any other. They're just not as pervasive.)
  #10  
Old August 22nd 10, 05:56 PM posted to comp.sys.ibm.pc.hardware.chips,comp.sys.intel,comp.arch
Terje Mathisen[_3_]
external usenet poster
 
Posts: 23
Default ISA does not matter

Brett Davis wrote:
Robert wrote:
I'll take the word of real computer architects on this one, Yousuf.
Past the decode stage, the ISA doesn't matter. Programmers and others
like to talk about ISA's because that's all they understand. ISA is
irrelevant now. Whatever obstacles there are to "emulating" x86 have
nothing to do with the ISA.

Robert.


You are wrong.

I give you the example of Apple's AltiVec instruction set.


AltiVec is a pretty nice, clean SIMD instruction set.

AltiVec at introduction gave the PowerPC chips a 10x speed advantage
on a bunch of important graphical benchmarks, and makes the vector


10x is bogus: This was only when comparing generic C on cpu A with
handcoded AltiVec asm.

processor useful in a wide variety of other tasks that are not
normally thought of as vector code. (Filesystem block allocation, etc.)

Ultimately this one innovation alone was not enough for PowerPC to
overcome all the disadvantages of competing against Intel, but it
did level the playing field for a decade.


Nothing like a decade: After SSE2 there's only been a very small delta
in throughput per cycle, mostly due to the very power-hungry but
extremely useful permute engine.

AltiVec came from a software firm, those "real computer architects"
idea of innovation was Thumb1 and MIPS16, bunch of (CENSORED).


Terje
--
- Terje.Mathisen at tmsw.no
"almost all programming can be viewed as an exercise in caching"
 




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