Questions about DDR RAM

Frank McCoy wrote:
How do you get several more bits with only one chip?
This isn't parity, but ECC.

As I recall a SECDED hamming-code for 32-bits would require a minimum of
7 extra bits for single-bit ECC correction and double-bit parity-error
detection.

If a standard DIMM gets 4 bits each in 8 chips, that would require a
minimum of two more chips, not one.


First of at it's not 32 bits. And 8 bits per 64 works well

rgds
\SK

In article ,
says...
In alt.comp.hardware.pc-homebuilt chrisv wrote:

Frank McCoy wrote:

OK ... That actually makes sense.
Still, there *are* several extra chips on the ECC-capable DIMM.
Extra data requires extra places to store it.

What part of "There is absolutely no logic on the DIMMs that contribute to ECC
- other than the extra drams for storage of the ECC check bits." did you miss?

The "other than the extra dram" part.

Which is one extra chip, not "several".

How do you get several more bits with only one chip?

Chips, these days, are more than one bit wide. X-1 chips went out
with button shoes.

This isn't parity, but ECC.

The memory doesn't know the difference.

As I recall a SECDED hamming-code for 32-bits would require a minimum of
7 extra bits for single-bit ECC correction and double-bit parity-error
detection.

Memory is 64bits wide these days. Run your numbers again.

If a standard DIMM gets 4 bits each in 8 chips, that would require a
minimum of two more chips, not one.

Try 8bits each in eight chips, add a ninth for parity/ECC.

--
Keith

In comp.sys.ibm.pc.hardware.chips krw wrote:
Memory is 64bits wide these days. Run your numbers again.

Quibble: *DIMMs* are 64-bits wide these days.

Memory, even just talking about main memory on the PC architecture, runs
from 64 bits to 256 (possibly 512, if you count AMD's lightweight NUMA as
parallel. Otherwise, 256 is for the quad-channel Xeon boards.)

ISTR some fairly ridiculous bus widths for high-end graphics cards, as well.

--
Nate Edel http://www.cubiclehermit.com/
preferred email | "With all the accumulated wit and wisdom in the
is "nate" at the | world, it is pointless to try to select a few
posting domain | choice quotes." (some guy from my HS yearbook)

On 2007-10-16, Frank McCoy wrote:

How do you get several more bits with only one chip?
This isn't parity, but ECC.

As I recall a SECDED hamming-code for 32-bits would require a minimum of
7 extra bits for single-bit ECC correction and double-bit parity-error
detection.

Only a standard DIMM is a 64 bit module, not 32. An additional
bit is required due to the enlarged module word size and so ECC
DIMM is 72 bit to accommodate the extra data. Taking a standard
8-chip DIMM you see that each chips takes 8 bit words and so only
a single additional module is required.

--
Andrew Smallshaw

In article ,
says...
In comp.sys.ibm.pc.hardware.chips krw wrote:
Memory is 64bits wide these days. Run your numbers again.

Quibble: *DIMMs* are 64-bits wide these days.

We were talking about memory.

Memory, even just talking about main memory on the PC architecture, runs
from 64 bits to 256 (possibly 512, if you count AMD's lightweight NUMA as
parallel. Otherwise, 256 is for the quad-channel Xeon boards.)

We were talking about memory, not processor implementation. Do you
have an example of an x86 processor with a wider than 64bit data path
to the DIMM (ignoring dual channel for the moment, which is simply
two DIMMs)?

ISTR some fairly ridiculous bus widths for high-end graphics cards, as well.

We were... Do you really have parity/ECC on graphics cards?

--
Keith

In comp.sys.ibm.pc.hardware.chips krw wrote:
In article ,
says...
In comp.sys.ibm.pc.hardware.chips krw wrote:
Memory is 64bits wide these days. Run your numbers again.

Quibble: *DIMMs* are 64-bits wide these days.

We were talking about memory.

Yes; all DIMMs are memory, but not all memory comes in DIMMs.

Memory comes in lots of widths, and no more explicitly applies to DIMMs than
to the individual chips on the DIMMs or soldered to a board.

Memory, even just talking about main memory on the PC architecture, runs
from 64 bits to 256 (possibly 512, if you count AMD's lightweight NUMA as
parallel. Otherwise, 256 is for the quad-channel Xeon boards.)

We were talking about memory, not processor implementation. Do you
have an example of an x86 processor with a wider than 64bit data path
to the DIMM (ignoring dual channel for the moment, which is simply
two DIMMs)?

x86? No, although you're changing the goalposts, and I did say it was a
quibble. The AMD dual channel implementation *IS* a full 128-bit path to
memory, just split between two DIMMs.

I have no idea what IBM uses for memory in their very high-end stuff, but
that's not x86; even high-end stuff from Sun, etc, tends to just use
multiple channels breaking down to DIMMs.

ISTR some fairly ridiculous bus widths for high-end graphics cards, as well.

We were... Do you really have parity/ECC on graphics cards?

Not on consumer stuff.

It's been a *long* time since I've paid attention to high-end workstation
graphics boards. It would be pretty implausible on consumer stuff or on
today's "derived from consumer" FireGL or Quadro boards.

Anyone have an old IBM PGA board from the mid-80s? I'd be quite surprised if
that DIDN'T have parity.

--
Nate Edel http://www.cubiclehermit.com/
preferred email | "With all the accumulated wit and wisdom in the
is "nate" at the | world, it is pointless to try to select a few
posting domain | choice quotes." (some guy from my HS yearbook)

On Thu, 18 Oct 2007 14:50:15 -0700, (Nate Edel) wrote:
[...]
Anyone have an old IBM PGA board from the mid-80s? I'd be quite surprised if
that DIDN'T have parity.

Really?
Why would *anyone* actually want parity on graphics memory?

/daytripper
(who's been surprised before...but I don't think it's happening this time ;-)

In article ,
says...
In comp.sys.ibm.pc.hardware.chips krw wrote:
In article ,
says...
In comp.sys.ibm.pc.hardware.chips krw wrote:
Memory is 64bits wide these days. Run your numbers again.

Quibble: *DIMMs* are 64-bits wide these days.

We were talking about memory.

Yes; all DIMMs are memory, but not all memory comes in DIMMs.

Memory comes in lots of widths, and no more explicitly applies to DIMMs than
to the individual chips on the DIMMs or soldered to a board.

Oh, good ****ing grief Gert! I know the Democrats in the Senate
don't believe it, but CONTEXT MATTERS. How long have DIMMs been the
only memory used?

Memory, even just talking about main memory on the PC architecture, runs
from 64 bits to 256 (possibly 512, if you count AMD's lightweight NUMA as
parallel. Otherwise, 256 is for the quad-channel Xeon boards.)

We were talking about memory, not processor implementation. Do you
have an example of an x86 processor with a wider than 64bit data path
to the DIMM (ignoring dual channel for the moment, which is simply
two DIMMs)?

x86? No, although you're changing the goalposts, and I did say it was a
quibble. The AMD dual channel implementation *IS* a full 128-bit path to
memory, just split between two DIMMs.

No, I'm not moving goal posts (look at the name of the NG). You're
being an pedantic ass.

I have no idea what IBM uses for memory in their very high-end stuff, but
that's not x86; even high-end stuff from Sun, etc, tends to just use
multiple channels breaking down to DIMMs.

I do know. Registered DIMMs, in fact. Anything else would be
stupid. Your point is?

ISTR some fairly ridiculous bus widths for high-end graphics cards, as well.

We were... Do you really have parity/ECC on graphics cards?

Not on consumer stuff.

Not on *ANY* stuff. Can you think of *one* reason to spend a nickel?
Add the complication?

It's been a *long* time since I've paid attention to high-end workstation
graphics boards. It would be pretty implausible on consumer stuff or on
today's "derived from consumer" FireGL or Quadro boards.

Anyone have an old IBM PGA board from the mid-80s? I'd be quite surprised if
that DIDN'T have parity.

I'd be *very* surprised if it did (in fact I know they didn't). I
have *NEVER* seen parity on graphics memory. WTF would anyone waste
money on that? What is the gain, one off-color pixel? Come on, stop
running away from your silliness.

--
Keith

In comp.sys.ibm.pc.hardware.chips daytripper wrote:
On Thu, 18 Oct 2007 14:50:15 -0700, (Nate Edel) wrote:
[...]
Anyone have an old IBM PGA board from the mid-80s? I'd be quite surprised if
that DIDN'T have parity.

Really?
Why would *anyone* actually want parity on graphics memory?

Framebuffer? Probably doesn't matter, since it's being rewritten
continuously.

That said, there's more to graphics memory ... and for some apps, you could
well want ECC any time the graphics memory contains uploadable code.

I was under the impression modern 3D stuff does, but it may always get the
instruction stream pushed to it? See also attempts to use the GPU as a
general vector processor for non-video use.

That said...

According to Wikipedia, what I was thinking of was the "PGC" (Professional
Graphics Controller) not the PGA, here's the article.

http://en.wikipedia.org/wiki/Profess...ics_Controller

It was a big ol' nightmare of a card, and basically a CAD accelerator. It
had its own memory and processor. That said, the picture here looks like
it's got banks of 8 chips: http://www.seasip.info/VintagePC/pgc.html so I
am probably wrong in my guess.

I've got a couple of old DEC systems with framebuffer cards, and could dig
those out, but they're relatively low-end early 1990s ones.

--
Nate Edel http://www.cubiclehermit.com/
preferred email | "With all the accumulated wit and wisdom in the
is "nate" at the | world, it is pointless to try to select a few
posting domain | choice quotes." (some guy from my HS yearbook)

In comp.sys.ibm.pc.hardware.chips krw wrote:
In article ,
In comp.sys.ibm.pc.hardware.chips krw wrote:
In article ,
In comp.sys.ibm.pc.hardware.chips krw wrote:
Memory is 64bits wide these days. Run your numbers again.

Quibble: *DIMMs* are 64-bits wide these days.

We were talking about memory.

Yes; all DIMMs are memory, but not all memory comes in DIMMs.

Memory comes in lots of widths, and no more explicitly applies to DIMMs than
to the individual chips on the DIMMs or soldered to a board.

Oh, good ****ing grief Gert! I know the Democrats in the Senate
don't believe it, but CONTEXT MATTERS. How long have DIMMs been the
only memory used?

The only memory used for what? Main-memory on mainstream PC motherboards,
it's probably close to ten years since 72-pin SIMMs went out.

Other uses? Never. There are plenty of other sorts and uses of memory.

They may or may not use ECC. That wasn't the point I was making.

Memory, even just talking about main memory on the PC architecture, runs
from 64 bits to 256 (possibly 512, if you count AMD's lightweight NUMA as
parallel. Otherwise, 256 is for the quad-channel Xeon boards.)

We were talking about memory, not processor implementation. Do you
have an example of an x86 processor with a wider than 64bit data path
to the DIMM (ignoring dual channel for the moment, which is simply
two DIMMs)?

x86? No, although you're changing the goalposts, and I did say it was a
quibble. The AMD dual channel implementation *IS* a full 128-bit path to
memory, just split between two DIMMs.

No, I'm not moving goal posts (look at the name of the NG). You're
being an pedantic ass.

A) This thread is being posted to several newsgroups:
alt.comp.hardware.hardware.homebuilt
alt.comp.hardware
alt.comp.hardware.pc-homebuilt
comp.sys.ibm.pc.hardware.chips
... and in practice, the last (where I'm reading) has plenty of
broader-ranging discussions.

B) Second, see above quoting my original post: I started by noting that it
was, indeed a quibble. You're the one objecting to my clarification,
which was a minor point. If that's "being an pedantic ass", deal with it.

I have no idea what IBM uses for memory in their very high-end stuff, but
that's not x86; even high-end stuff from Sun, etc, tends to just use
multiple channels breaking down to DIMMs.

I do know. Registered DIMMs, in fact. Anything else would be
stupid. Your point is?

So the z-series and similar uses DIMMs? Fair enough.

ISTR some fairly ridiculous bus widths for high-end graphics cards, as well.

We were... Do you really have parity/ECC on graphics cards?

Not on consumer stuff.

Not on *ANY* stuff. Can you think of *one* reason to spend a nickel?
Add the complication?

Raw framebuffers have no need for parity/ECC. Graphics memory these days is
hardly just a raw framebuffer.

It's been a *long* time since I've paid attention to high-end workstation
graphics boards. It would be pretty implausible on consumer stuff or on
today's "derived from consumer" FireGL or Quadro boards.

Anyone have an old IBM PGA board from the mid-80s? I'd be quite surprised if
that DIDN'T have parity.

I'd be *very* surprised if it did (in fact I know they didn't). I
have *NEVER* seen parity on graphics memory. WTF would anyone waste
money on that? What is the gain, one off-color pixel? Come on, stop
running away from your silliness.

So it only ran out of the ROM routines?

--
Nate Edel http://www.cubiclehermit.com/
preferred email | "With all the accumulated wit and wisdom in the
is "nate" at the | world, it is pointless to try to select a few
posting domain | choice quotes." (some guy from my HS yearbook)