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Processor heat dissipation, Leakage current, voltages & clockspeed
I know I'm a bit slow to start looking up this since the Prescott
thrust the issue into lime light. I didn't quite follow the major discussion some weeks back. My friend got himself a spanking new Prescott and claims it wasn't that hot despite claims. Yet Intel did cancel the 4Ghz version so it got me thinking again whether the heat increases dramatically with clockspeed. Since leakage was the big thing thrown about, whether that was what increased with clockspeed. And whether we could do any experiments to test it out. So I started doing some reading up mainly from the tutorial document posted some time back. Tried to understand these issues but don't think I got very far. Would appreciate it greatly if the resident experts here point out where I might have understood it wrongly. I don't understand most of the explanations for how these are calculated (most of the documents assume proficiency with mathematical symbology which every regular visitor here knows by now I suck at PPpP). So here's my best effort at arriving at something useful to me as a layperson who's interested only in getting a useful real world approximation of how these things are, say x.x rather than x.xxxxxx kind of accuracy PpP Reading, googling and all that, I get formulas and statement that generally say that Total Power = Dynamic Power + Static + Leakage + Short Circuit Dynamic power is directly related to clockspeed. Leakage doesn't care about clockspeed and is a function of the process/technology but appears to be in direct relation with temperature, i.e. hotter processors will leak even more power?. I got a bit confused with a graph that displaying Leakage current vs Vgs. http://www.cse.psu.edu/~vijay/iscatu...al-sources.pdf at pg 7. It seems to imply that lowering voltages will increase the leakage?? Anyway, the point is, can I say that given the usual x86 processor. The difference between the power dissipated at 3Ghz and at 4Ghz is still mostly clockspeed. Because dynamic power has to do with whether there's any actual activity, both a 3Ghz and 4Ghz would have similar power draw when idling since leakage will be there but dynamic would be very low. While Static and Short are pretty much constant? Or would Short also be directly related to the amount of activity since it's determined by the slope of the signal so if there's no activity, there's no direct current situation since there's no switching done. So if we set the same (static becomes a constant) prescott at various vcore (changes leakage right?), change the clockspeeds (changes Dynamic), measure idle and load power dissipation, would we then be able to calculate roughly the power used by Dynamic, Static, Short and Leakage? TiA!!!! -- L.Angel: I'm looking for web design work. If you need basic to med complexity webpages at affordable rates, email me Standard HTML, SHTML, MySQL + PHP or ASP, Javascript. If you really want, FrontPage & DreamWeaver too. But keep in mind you pay extra bandwidth for their bloated code |
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