Alexis Cousein wrote:

subsystem wrote:

In the patent, it was prefered that each *APU* have 32 GFLOPs
performance.
Not each PE.



Yes -- *preferred*. I'd also prefer to have 1 Tflops on my desktop.

Also, it's a *patent* application, so even the "preferred" numbers are
probably not talking about the first implementation.

Yeah I also think that running 32 SIMD processors @ 4GHz within a 100 W
envelope is kind of optimistic for the 2006 timeframe.

It will probably launch at 1 to 2 GHz which will still result in TEH
CRAZY peak floating point performance.

Cheers
Martin