Jack Crenshaw wrote:

.... snip ...

The IEEE standard for 32-bit floats says the format should be

sign -- 1 bit
exponent -- 8 bits, power of 2, split on 127
mantissa -- 23 bits + phantom bit in bit 24.

The Intel processor seems to use the following:

sign -- 1 bit
exponent -- _SEVEN_ bits, power of _FOUR_
mantissa -- sometimes 23 bits, sometimes 24. Sometimes
phantom bit, sometimes not. When it's there, it's in bit
_TWENTY_THREE_ !

.... snip ...

You'll see that 1 -- 3f800000 (high bit is visible)
but 2 -- 40000000 (high bit is not)

Try a few others and see what you get. Some will surprise you.

I know that there must be people out there to whom this is old,
old news. Even so, I've never seen a word about it, and didn't
find anything in a Google search. I'd appreciate any comments.

What chips does this format appear in? I expect the presence or
absence of normalization depends on the oddness of the exponent
byte. It makes sense for byte addressed memory based systems,
since zero (ignoring denormalization) can be detected in a single
byte.

--
Chuck F ) )
Available for consulting/temporary embedded and systems.
http://cbfalconer.home.att.net USE worldnet address!