HardwareBanter

HardwareBanter (http://www.hardwarebanter.com/index.php)
-   Overclocking (http://www.hardwarebanter.com/forumdisplay.php?f=11)
-   -   Maximum System Bus Speed (http://www.hardwarebanter.com/showthread.php?t=10599)

David Maynard April 8th 04 05:38 AM

Ziferten wrote:

What is the maximum that the Athlon XP 2800+ supports? I use a Gigabyte
GA-7N400 Pro2 by the way



It's a 333MHz FSB processor.


BigBadger April 8th 04 06:31 AM

No it's not 333MHz, it's actually a 166 'MHz' FSB processor....333 is just
AMD hype to sell the virtues of the DDR bus. Intel do the same trick but
they multiply the real bus speed by 4x.

The maximum that the processor will run at depends on many things. If it's
un-locked you would be able to lower the multiplier and run it on a 200MHz
FSB, however if its one of the more recent locked models the maximum FSB
would be in the region of 175-190MHz, depending on how overclockable the cpu
is, how good your cooling is etc.

--
*****Replace 'NOSPAM' with 'btinternet' in the reply address*****
"David Maynard" wrote in message
...
Ziferten wrote:

What is the maximum that the Athlon XP 2800+ supports? I use a Gigabyte
GA-7N400 Pro2 by the way



It's a 333MHz FSB processor.




Ziferten April 8th 04 06:46 AM

Maximum System Bus Speed
 
What is the maximum that the Athlon XP 2800+ supports? I use a Gigabyte
GA-7N400 Pro2 by the way



David Maynard April 8th 04 09:17 AM

BigBadger wrote:

No it's not 333MHz, it's actually a 166 'MHz' FSB processor....333 is just
AMD hype to sell the virtues of the DDR bus. Intel do the same trick but
they multiply the real bus speed by 4x.


Double and quad pumping the bus is not "hype." It's an engineering
technique for transferring data twice, or 4 times for quad, per clock cycle.

333 is the bus cycle rate, e.g. "Bus Speed," and is the relevant number
from a performance standpoint.


The maximum that the processor will run at depends on many things. If it's
un-locked you would be able to lower the multiplier and run it on a 200MHz
FSB, however if its one of the more recent locked models the maximum FSB
would be in the region of 175-190MHz, depending on how overclockable the cpu
is, how good your cooling is etc.


He didn't ask what speed he might be able to push it to. He asked "What is
the maximum that the Athlon XP 2800+ supports?" and the "Maximum System Bus
Speed" that the processor "supports" is the bus speed it's rated for.


Wayne Youngman April 8th 04 01:07 PM


"Ziferten" wrote
What is the maximum that the Athlon XP 2800+ supports? I use a Gigabyte
GA-7N400 Pro2 by the way



Hi,

the standard *system bus* for the XP2800+ is 333MHz, but you should be able
to run it on the 400MHz *system-bus*. This would depend on whether or not
your CPU was locked.

I'm not familiar with your mobo.
--
Wayne ][



Michael Brown April 8th 04 01:33 PM

David Maynard wrote:
BigBadger wrote:

No it's not 333MHz, it's actually a 166 'MHz' FSB processor....333
is just AMD hype to sell the virtues of the DDR bus. Intel do the
same trick but they multiply the real bus speed by 4x.


Double and quad pumping the bus is not "hype." It's an engineering
technique for transferring data twice, or 4 times for quad, per clock
cycle.

333 is the bus cycle rate, e.g. "Bus Speed," and is the relevant
number from a performance standpoint.


Oh dear, oh dear, here we go again ... :) It depends on whether you measure
the control lines or the data lines for quoting the "bus speed" number.

I actually think a more accurate way of representing it (performance-wise)
is a 128-bit bus (DDR) or 256-bit bus (QDR), both running at 166MHz. A good
example is the latency for main memory. Say you have a 166MHz DDR system
(aka DDR333), and a 100MHz QDR system (aka QDR400), and the CPU runs at 1GHz
(6.0x for DDR, 10.0x for QDR). Excluding memory latencies, to fill a
randomly-accessed 64-byte cache line would take:
Waiting for bus strobe: 3.0 cycles (DDR system), 5.0 cycles (QDR system)
Transferring data: 24 cycles (DDR), 20 cycles (QDR)
Total: 27 cycles (DDR), 25 cycles (QDR)
So DDR333 is, under random access conditions, only marginally slower than
QDR400. The actual break-even point is 180MHz (actually slightly above due
to memory latencies), but hopefully you get the idea. Of course, the QDR
system will perform better under "streaming" type conditions, where the
higher latency won't matter so much.

Incidentally, this issue is exasparated by the P4's 128-byte cache line, as
opposed to the 64-byte cache line of the K7.

Finally, using the non-multiplied speed would stop people complaining that
their motherboard only goes up to 250MHz :)

[...]

--
Michael Brown
www.emboss.co.nz : OOS/RSI software and more :)
Add michael@ to emboss.co.nz - My inbox is always open



David Maynard April 8th 04 07:19 PM

Michael Brown wrote:
David Maynard wrote:

BigBadger wrote:


No it's not 333MHz, it's actually a 166 'MHz' FSB processor....333
is just AMD hype to sell the virtues of the DDR bus. Intel do the
same trick but they multiply the real bus speed by 4x.


Double and quad pumping the bus is not "hype." It's an engineering
technique for transferring data twice, or 4 times for quad, per clock
cycle.

333 is the bus cycle rate, e.g. "Bus Speed," and is the relevant
number from a performance standpoint.



Oh dear, oh dear, here we go again ... :) It depends on whether you measure
the control lines or the data lines for quoting the "bus speed" number.


No it doesn't. It has to do with how many data transfer cycles there are.

I actually think a more accurate way of representing it (performance-wise)
is a 128-bit bus (DDR) or 256-bit bus (QDR), both running at 166MHz.


Except it isn't '128 bits' or '256 bits' wide. It does, however, transfer
data at either 2, for dual pumped, or 4 times, for quad pumped, the system
clock rate.

A good
example is the latency for main memory.


Which is a separate component independent of the bus and not even ON, or
even necessarily run at the speed of, the bus at issue.

Say you have a 166MHz DDR system
(aka DDR333), and a 100MHz QDR system (aka QDR400), and the CPU runs at 1GHz
(6.0x for DDR, 10.0x for QDR). Excluding memory latencies, to fill a
randomly-accessed 64-byte cache line would take:
Waiting for bus strobe: 3.0 cycles (DDR system), 5.0 cycles (QDR system)
Transferring data: 24 cycles (DDR), 20 cycles (QDR)
Total: 27 cycles (DDR), 25 cycles (QDR)

So DDR333 is, under random access conditions, only marginally slower than
QDR400. The actual break-even point is 180MHz (actually slightly above due
to memory latencies), but hopefully you get the idea. Of course, the QDR
system will perform better under "streaming" type conditions, where the
higher latency won't matter so much.


No, you're analyzing the memory, not the processor bus.

We can sit here all day long proposing new terminology but that's
irrelevant to the matter.


Incidentally, this issue is exasparated by the P4's 128-byte cache line, as
opposed to the 64-byte cache line of the K7.


Processor (L2) cache has nothing to do with bus speed. It affects processor
performance, of course, but then so does the L1 cache, cpu architecture,
and core speed: none of which have anything to do with the bus speed either.

Btw, what don't you call a 3.4 Gig P4 a 200Mhz P4 because the 'real clock'
(sic) is 200 Mhz. That 3.4 Gig number is just 'hype'.

Finally, using the non-multiplied speed would stop people complaining that
their motherboard only goes up to 250MHz :)


Requiring everyone to use the same bus and speed would solve it too but
that hardly means it's desirable.


[...]

--
Michael Brown
www.emboss.co.nz : OOS/RSI software and more :)
Add michael@ to emboss.co.nz - My inbox is always open




P2B April 9th 04 12:46 AM



David Maynard wrote:
BigBadger wrote:

No it's not 333MHz, it's actually a 166 'MHz' FSB processor....333 is
just
AMD hype to sell the virtues of the DDR bus. Intel do the same trick but
they multiply the real bus speed by 4x.



Double and quad pumping the bus is not "hype." It's an engineering
technique for transferring data twice, or 4 times for quad, per clock
cycle.

333 is the bus cycle rate, e.g. "Bus Speed," and is the relevant number
from a performance standpoint.


I don't see much point in arguing this one in technical terms.

The fact is the term 'FSB' was used for many years to refer to the
memory/processor bus *clock frequency*, and reusing the same term for
the bus *bit rate* has caused no end of confusion and was therefore a
Bad Idea (tm).

One could also argue that use of the term 'hertz' (as in MHz) in
reference to anything other than the periodic interval of a waveform is
incorrect. Heinrich Rudolf is probably spinning in his grave :-)

Intel themselves can't even get it straight: If you look up P3
processors at processorfinder.intel.com, 'Bus Speed' x 'Bus/Core Ratio'
= 'Processor Frequency', but the same calculation yields a number 4x
bigger than it should be when you look up 'pumped' processors.

The maximum that the processor will run at depends on many things. If
it's
un-locked you would be able to lower the multiplier and run it on a
200MHz
FSB, however if its one of the more recent locked models the maximum FSB
would be in the region of 175-190MHz, depending on how overclockable
the cpu
is, how good your cooling is etc.


He didn't ask what speed he might be able to push it to. He asked "What
is the maximum that the Athlon XP 2800+ supports?" and the "Maximum
System Bus Speed" that the processor "supports" is the bus speed it's
rated for.



David Maynard April 9th 04 01:58 AM

P2B wrote:



David Maynard wrote:

BigBadger wrote:

No it's not 333MHz, it's actually a 166 'MHz' FSB processor....333 is
just
AMD hype to sell the virtues of the DDR bus. Intel do the same trick but
they multiply the real bus speed by 4x.




Double and quad pumping the bus is not "hype." It's an engineering
technique for transferring data twice, or 4 times for quad, per clock
cycle.

333 is the bus cycle rate, e.g. "Bus Speed," and is the relevant
number from a performance standpoint.



I don't see much point in arguing this one in technical terms.

The fact is the term 'FSB' was used for many years to refer to the
memory/processor bus *clock frequency*,


The term "FSB" has always referred to the "Front Side Bus" and not a
'clock'. What you refer to is simply that, for a considerable length of
time, the Front Side Bus 'speed', I.E. data rate, was coincident with the
base rate of the system clock.

It isn't, however, when the bus is dual or quad pumped.


and reusing the same term for
the bus *bit rate* has caused no end of confusion and was therefore a
Bad Idea (tm).


I'm not using the term "FSB" to refer to a 'clock' or 'bit rate' or
anything other than what it's always referred to: the "Front Side Bus."


One could also argue that use of the term 'hertz' (as in MHz) in
reference to anything other than the periodic interval of a waveform is
incorrect. Heinrich Rudolf is probably spinning in his grave :-)


Yes. In previous discussions I've also pointed out that same argument as
the perspective of the 'purist'. It does, however, beg the question about
the data rate of a 166.6Mhz clocked double data rate bus being 333 'what'?
To which I mused perhaps we should regret having changed from the original
designation of "Cycles/Second" to "Hertz." (It's interesting to note that
few would find such a problem with a bus rate designation of 333
'Mega-Cycles/Second' but do when the synonym "Hertz" is substituted)

"MHz" may not be a 'purist' form of usage here but it captures the
pertinent aspect of the bus speed in a context consistent with the single
data rate bus and is certainly not 'hype', which was the original point.

I.E. Of what relevance to the 'real' (sic) 'bus speed' is it how the
designer derived his timing signals? Other than to 'techies', that is.





~misfit~ April 9th 04 02:24 AM

David Maynard wrote:
BigBadger wrote:

No it's not 333MHz, it's actually a 166 'MHz' FSB processor....333
is just AMD hype to sell the virtues of the DDR bus. Intel do the
same trick but they multiply the real bus speed by 4x.


Double and quad pumping the bus is not "hype." It's an engineering
technique for transferring data twice, or 4 times for quad, per clock
cycle.

333 is the bus cycle rate, e.g. "Bus Speed," and is the relevant
number from a performance standpoint.


Yes, but David my friend, you said "333MHz FSB". That is plainly incorrect,
the "MHz" part of it.
--
~misfit~




All times are GMT +1. The time now is 06:12 AM.

Powered by vBulletin® Version 3.6.4
Copyright ©2000 - 2024, Jelsoft Enterprises Ltd.
HardwareBanter.com